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https://github.com/edk2-porting/linux-next.git
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sh-pfc: r8a7790: Sort pin groups and functions alphabetically
Navigating through the source code is hard enough without having to manually search for groups and functions. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
This commit is contained in:
Laurent Pinchart
parent
0a664e3d79
commit
457c11d3e8
@ -1814,128 +1814,6 @@ static const unsigned int eth_rmii_mux[] = {
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ETH_RXD0_MARK, ETH_RXD1_MARK, ETH_RX_ER_MARK, ETH_CRS_DV_MARK,
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ETH_TXD0_MARK, ETH_TXD1_MARK, ETH_TX_EN_MARK, ETH_REF_CLK_MARK,
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};
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/* - INTC ------------------------------------------------------------------- */
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static const unsigned int intc_irq0_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 25),
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};
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static const unsigned int intc_irq0_mux[] = {
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IRQ0_MARK,
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};
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static const unsigned int intc_irq1_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 27),
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};
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static const unsigned int intc_irq1_mux[] = {
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IRQ1_MARK,
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};
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static const unsigned int intc_irq2_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 29),
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};
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static const unsigned int intc_irq2_mux[] = {
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IRQ2_MARK,
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};
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static const unsigned int intc_irq3_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 23),
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};
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static const unsigned int intc_irq3_mux[] = {
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IRQ3_MARK,
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};
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/* - SCIF0 ----------------------------------------------------------------- */
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static const unsigned int scif0_data_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
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};
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static const unsigned int scif0_data_mux[] = {
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RX0_MARK, TX0_MARK,
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};
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static const unsigned int scif0_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 27),
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};
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static const unsigned int scif0_clk_mux[] = {
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SCK0_MARK,
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};
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static const unsigned int scif0_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
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};
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static const unsigned int scif0_ctrl_mux[] = {
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RTS0_N_MARK, CTS0_N_MARK,
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};
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static const unsigned int scif0_data_b_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
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};
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static const unsigned int scif0_data_b_mux[] = {
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RX0_B_MARK, TX0_B_MARK,
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};
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/* - SCIF1 ----------------------------------------------------------------- */
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static const unsigned int scif1_data_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
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};
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static const unsigned int scif1_data_mux[] = {
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RX1_MARK, TX1_MARK,
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};
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static const unsigned int scif1_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 20),
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};
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static const unsigned int scif1_clk_mux[] = {
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SCK1_MARK,
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};
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static const unsigned int scif1_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
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};
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static const unsigned int scif1_ctrl_mux[] = {
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RTS1_N_MARK, CTS1_N_MARK,
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};
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static const unsigned int scif1_data_b_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
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};
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static const unsigned int scif1_data_b_mux[] = {
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RX1_B_MARK, TX1_B_MARK,
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};
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static const unsigned int scif1_data_c_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
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};
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static const unsigned int scif1_data_c_mux[] = {
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RX1_C_MARK, TX1_C_MARK,
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};
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static const unsigned int scif1_data_d_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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};
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static const unsigned int scif1_data_d_mux[] = {
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RX1_D_MARK, TX1_D_MARK,
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};
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static const unsigned int scif1_clk_d_pins[] = {
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/* SCK */
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RCAR_GP_PIN(3, 17),
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};
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static const unsigned int scif1_clk_d_mux[] = {
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SCK1_D_MARK,
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};
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static const unsigned int scif1_data_e_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
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};
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static const unsigned int scif1_data_e_mux[] = {
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RX1_E_MARK, TX1_E_MARK,
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};
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static const unsigned int scif1_clk_e_pins[] = {
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/* SCK */
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RCAR_GP_PIN(2, 20),
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};
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static const unsigned int scif1_clk_e_mux[] = {
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SCK1_E_MARK,
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};
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/* - HSCIF0 ----------------------------------------------------------------- */
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static const unsigned int hscif0_data_pins[] = {
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/* RX, TX */
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@ -2071,6 +1949,196 @@ static const unsigned int hscif1_ctrl_b_pins[] = {
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static const unsigned int hscif1_ctrl_b_mux[] = {
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HRTS1_N_B_MARK, HCTS1_N_B_MARK,
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};
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/* - INTC ------------------------------------------------------------------- */
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static const unsigned int intc_irq0_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 25),
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};
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static const unsigned int intc_irq0_mux[] = {
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IRQ0_MARK,
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};
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static const unsigned int intc_irq1_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 27),
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};
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static const unsigned int intc_irq1_mux[] = {
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IRQ1_MARK,
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};
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static const unsigned int intc_irq2_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 29),
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};
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static const unsigned int intc_irq2_mux[] = {
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IRQ2_MARK,
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};
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static const unsigned int intc_irq3_pins[] = {
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/* IRQ */
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RCAR_GP_PIN(1, 23),
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};
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static const unsigned int intc_irq3_mux[] = {
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IRQ3_MARK,
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};
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/* - MMCIF0 ----------------------------------------------------------------- */
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static const unsigned int mmc0_data1_pins[] = {
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/* D[0] */
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RCAR_GP_PIN(3, 18),
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};
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static const unsigned int mmc0_data1_mux[] = {
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MMC0_D0_MARK,
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};
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static const unsigned int mmc0_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
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};
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static const unsigned int mmc0_data4_mux[] = {
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MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
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};
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static const unsigned int mmc0_data8_pins[] = {
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/* D[0:7] */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
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RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
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RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
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};
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static const unsigned int mmc0_data8_mux[] = {
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MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
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MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK,
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};
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static const unsigned int mmc0_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
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};
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static const unsigned int mmc0_ctrl_mux[] = {
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MMC0_CLK_MARK, MMC0_CMD_MARK,
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};
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/* - MMCIF1 ----------------------------------------------------------------- */
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static const unsigned int mmc1_data1_pins[] = {
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/* D[0] */
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RCAR_GP_PIN(3, 26),
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};
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static const unsigned int mmc1_data1_mux[] = {
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MMC1_D0_MARK,
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};
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static const unsigned int mmc1_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
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RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
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};
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static const unsigned int mmc1_data4_mux[] = {
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MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
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};
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static const unsigned int mmc1_data8_pins[] = {
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/* D[0:7] */
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RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
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RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
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RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
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RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
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};
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static const unsigned int mmc1_data8_mux[] = {
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MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
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MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK,
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};
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static const unsigned int mmc1_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
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};
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static const unsigned int mmc1_ctrl_mux[] = {
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MMC1_CLK_MARK, MMC1_CMD_MARK,
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};
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/* - SCIF0 ------------------------------------------------------------------ */
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static const unsigned int scif0_data_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(4, 28), RCAR_GP_PIN(4, 29),
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};
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static const unsigned int scif0_data_mux[] = {
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RX0_MARK, TX0_MARK,
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};
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static const unsigned int scif0_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 27),
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};
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static const unsigned int scif0_clk_mux[] = {
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SCK0_MARK,
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};
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static const unsigned int scif0_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
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};
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static const unsigned int scif0_ctrl_mux[] = {
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RTS0_N_MARK, CTS0_N_MARK,
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};
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static const unsigned int scif0_data_b_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(0, 4), RCAR_GP_PIN(0, 5),
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};
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static const unsigned int scif0_data_b_mux[] = {
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RX0_B_MARK, TX0_B_MARK,
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};
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/* - SCIF1 ------------------------------------------------------------------ */
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static const unsigned int scif1_data_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(5, 0), RCAR_GP_PIN(5, 1),
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};
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static const unsigned int scif1_data_mux[] = {
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RX1_MARK, TX1_MARK,
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};
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static const unsigned int scif1_clk_pins[] = {
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/* SCK */
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RCAR_GP_PIN(4, 20),
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};
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static const unsigned int scif1_clk_mux[] = {
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SCK1_MARK,
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};
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static const unsigned int scif1_ctrl_pins[] = {
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/* RTS, CTS */
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RCAR_GP_PIN(5, 3), RCAR_GP_PIN(5, 2),
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};
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static const unsigned int scif1_ctrl_mux[] = {
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RTS1_N_MARK, CTS1_N_MARK,
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};
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static const unsigned int scif1_data_b_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
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};
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static const unsigned int scif1_data_b_mux[] = {
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RX1_B_MARK, TX1_B_MARK,
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};
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static const unsigned int scif1_data_c_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(4, 1), RCAR_GP_PIN(4, 2),
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};
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static const unsigned int scif1_data_c_mux[] = {
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RX1_C_MARK, TX1_C_MARK,
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};
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static const unsigned int scif1_data_d_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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};
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static const unsigned int scif1_data_d_mux[] = {
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RX1_D_MARK, TX1_D_MARK,
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};
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static const unsigned int scif1_clk_d_pins[] = {
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/* SCK */
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RCAR_GP_PIN(3, 17),
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};
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static const unsigned int scif1_clk_d_mux[] = {
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SCK1_D_MARK,
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};
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static const unsigned int scif1_data_e_pins[] = {
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/* RX, TX */
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RCAR_GP_PIN(2, 21), RCAR_GP_PIN(2, 22),
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};
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static const unsigned int scif1_data_e_mux[] = {
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RX1_E_MARK, TX1_E_MARK,
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};
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static const unsigned int scif1_clk_e_pins[] = {
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/* SCK */
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RCAR_GP_PIN(2, 20),
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};
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static const unsigned int scif1_clk_e_mux[] = {
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SCK1_E_MARK,
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};
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/* - SCIFA0 ----------------------------------------------------------------- */
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static const unsigned int scifa0_data_pins[] = {
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/* RXD, TXD */
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@ -2434,103 +2502,6 @@ static const unsigned int scifb2_data_c_pins[] = {
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static const unsigned int scifb2_data_c_mux[] = {
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SCIFB2_RXD_C_MARK, SCIFB2_TXD_C_MARK,
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};
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/* - TPU0 ------------------------------------------------------------------- */
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static const unsigned int tpu0_to0_pins[] = {
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/* TO */
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RCAR_GP_PIN(0, 20),
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};
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static const unsigned int tpu0_to0_mux[] = {
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TPU0TO0_MARK,
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};
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static const unsigned int tpu0_to1_pins[] = {
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/* TO */
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RCAR_GP_PIN(0, 21),
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};
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static const unsigned int tpu0_to1_mux[] = {
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TPU0TO1_MARK,
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};
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static const unsigned int tpu0_to2_pins[] = {
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/* TO */
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RCAR_GP_PIN(0, 22),
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};
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static const unsigned int tpu0_to2_mux[] = {
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TPU0TO2_MARK,
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};
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static const unsigned int tpu0_to3_pins[] = {
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/* TO */
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RCAR_GP_PIN(0, 23),
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};
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static const unsigned int tpu0_to3_mux[] = {
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TPU0TO3_MARK,
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};
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/* - MMCIF0 ----------------------------------------------------------------- */
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static const unsigned int mmc0_data1_pins[] = {
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/* D[0] */
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RCAR_GP_PIN(3, 18),
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};
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static const unsigned int mmc0_data1_mux[] = {
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MMC0_D0_MARK,
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};
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static const unsigned int mmc0_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
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};
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static const unsigned int mmc0_data4_mux[] = {
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MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
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};
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static const unsigned int mmc0_data8_pins[] = {
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/* D[0:7] */
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RCAR_GP_PIN(3, 18), RCAR_GP_PIN(3, 19),
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RCAR_GP_PIN(3, 20), RCAR_GP_PIN(3, 21),
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RCAR_GP_PIN(3, 22), RCAR_GP_PIN(3, 23),
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RCAR_GP_PIN(3, 6), RCAR_GP_PIN(3, 7),
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};
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static const unsigned int mmc0_data8_mux[] = {
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MMC0_D0_MARK, MMC0_D1_MARK, MMC0_D2_MARK, MMC0_D3_MARK,
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MMC0_D4_MARK, MMC0_D5_MARK, MMC0_D6_MARK, MMC0_D7_MARK,
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};
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static const unsigned int mmc0_ctrl_pins[] = {
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/* CLK, CMD */
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RCAR_GP_PIN(3, 16), RCAR_GP_PIN(3, 17),
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};
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static const unsigned int mmc0_ctrl_mux[] = {
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MMC0_CLK_MARK, MMC0_CMD_MARK,
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};
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/* - MMCIF1 ----------------------------------------------------------------- */
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static const unsigned int mmc1_data1_pins[] = {
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/* D[0] */
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RCAR_GP_PIN(3, 26),
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};
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static const unsigned int mmc1_data1_mux[] = {
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MMC1_D0_MARK,
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};
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static const unsigned int mmc1_data4_pins[] = {
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/* D[0:3] */
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RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
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RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
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};
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static const unsigned int mmc1_data4_mux[] = {
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MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
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};
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static const unsigned int mmc1_data8_pins[] = {
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/* D[0:7] */
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RCAR_GP_PIN(3, 26), RCAR_GP_PIN(3, 27),
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RCAR_GP_PIN(3, 28), RCAR_GP_PIN(3, 29),
|
||||
RCAR_GP_PIN(3, 30), RCAR_GP_PIN(3, 31),
|
||||
RCAR_GP_PIN(3, 14), RCAR_GP_PIN(3, 15),
|
||||
};
|
||||
static const unsigned int mmc1_data8_mux[] = {
|
||||
MMC1_D0_MARK, MMC1_D1_MARK, MMC1_D2_MARK, MMC1_D3_MARK,
|
||||
MMC1_D4_MARK, MMC1_D5_MARK, MMC1_D6_MARK, MMC1_D7_MARK,
|
||||
};
|
||||
static const unsigned int mmc1_ctrl_pins[] = {
|
||||
/* CLK, CMD */
|
||||
RCAR_GP_PIN(3, 24), RCAR_GP_PIN(3, 25),
|
||||
};
|
||||
static const unsigned int mmc1_ctrl_mux[] = {
|
||||
MMC1_CLK_MARK, MMC1_CMD_MARK,
|
||||
};
|
||||
/* - SDHI0 ------------------------------------------------------------------ */
|
||||
static const unsigned int sdhi0_data1_pins[] = {
|
||||
/* D0 */
|
||||
@ -2675,6 +2646,35 @@ static const unsigned int sdhi3_wp_pins[] = {
|
||||
static const unsigned int sdhi3_wp_mux[] = {
|
||||
SD3_WP_MARK,
|
||||
};
|
||||
/* - TPU0 ------------------------------------------------------------------- */
|
||||
static const unsigned int tpu0_to0_pins[] = {
|
||||
/* TO */
|
||||
RCAR_GP_PIN(0, 20),
|
||||
};
|
||||
static const unsigned int tpu0_to0_mux[] = {
|
||||
TPU0TO0_MARK,
|
||||
};
|
||||
static const unsigned int tpu0_to1_pins[] = {
|
||||
/* TO */
|
||||
RCAR_GP_PIN(0, 21),
|
||||
};
|
||||
static const unsigned int tpu0_to1_mux[] = {
|
||||
TPU0TO1_MARK,
|
||||
};
|
||||
static const unsigned int tpu0_to2_pins[] = {
|
||||
/* TO */
|
||||
RCAR_GP_PIN(0, 22),
|
||||
};
|
||||
static const unsigned int tpu0_to2_mux[] = {
|
||||
TPU0TO2_MARK,
|
||||
};
|
||||
static const unsigned int tpu0_to3_pins[] = {
|
||||
/* TO */
|
||||
RCAR_GP_PIN(0, 23),
|
||||
};
|
||||
static const unsigned int tpu0_to3_mux[] = {
|
||||
TPU0TO3_MARK,
|
||||
};
|
||||
|
||||
static const struct sh_pfc_pin_group pinmux_groups[] = {
|
||||
SH_PFC_PIN_GROUP(eth_link),
|
||||
@ -2809,32 +2809,6 @@ static const char * const eth_groups[] = {
|
||||
"eth_rmii",
|
||||
};
|
||||
|
||||
static const char * const intc_groups[] = {
|
||||
"intc_irq0",
|
||||
"intc_irq1",
|
||||
"intc_irq2",
|
||||
"intc_irq3",
|
||||
};
|
||||
|
||||
static const char * const scif0_groups[] = {
|
||||
"scif0_data",
|
||||
"scif0_clk",
|
||||
"scif0_ctrl",
|
||||
"scif0_data_b",
|
||||
};
|
||||
|
||||
static const char * const scif1_groups[] = {
|
||||
"scif1_data",
|
||||
"scif1_clk",
|
||||
"scif1_ctrl",
|
||||
"scif1_data_b",
|
||||
"scif1_data_c",
|
||||
"scif1_data_d",
|
||||
"scif1_clk_d",
|
||||
"scif1_data_e",
|
||||
"scif1_clk_e",
|
||||
};
|
||||
|
||||
static const char * const hscif0_groups[] = {
|
||||
"hscif0_data",
|
||||
"hscif0_clk",
|
||||
@ -2860,6 +2834,46 @@ static const char * const hscif1_groups[] = {
|
||||
"hscif1_ctrl_b",
|
||||
};
|
||||
|
||||
static const char * const intc_groups[] = {
|
||||
"intc_irq0",
|
||||
"intc_irq1",
|
||||
"intc_irq2",
|
||||
"intc_irq3",
|
||||
};
|
||||
|
||||
static const char * const mmc0_groups[] = {
|
||||
"mmc0_data1",
|
||||
"mmc0_data4",
|
||||
"mmc0_data8",
|
||||
"mmc0_ctrl",
|
||||
};
|
||||
|
||||
static const char * const mmc1_groups[] = {
|
||||
"mmc1_data1",
|
||||
"mmc1_data4",
|
||||
"mmc1_data8",
|
||||
"mmc1_ctrl",
|
||||
};
|
||||
|
||||
static const char * const scif0_groups[] = {
|
||||
"scif0_data",
|
||||
"scif0_clk",
|
||||
"scif0_ctrl",
|
||||
"scif0_data_b",
|
||||
};
|
||||
|
||||
static const char * const scif1_groups[] = {
|
||||
"scif1_data",
|
||||
"scif1_clk",
|
||||
"scif1_ctrl",
|
||||
"scif1_data_b",
|
||||
"scif1_data_c",
|
||||
"scif1_data_d",
|
||||
"scif1_clk_d",
|
||||
"scif1_data_e",
|
||||
"scif1_clk_e",
|
||||
};
|
||||
|
||||
static const char * const scifa0_groups[] = {
|
||||
"scifa0_data",
|
||||
"scifa0_clk",
|
||||
@ -2929,27 +2943,6 @@ static const char * const scifb2_groups[] = {
|
||||
"scifb2_data_c",
|
||||
};
|
||||
|
||||
static const char * const tpu0_groups[] = {
|
||||
"tpu0_to0",
|
||||
"tpu0_to1",
|
||||
"tpu0_to2",
|
||||
"tpu0_to3",
|
||||
};
|
||||
|
||||
static const char * const mmc0_groups[] = {
|
||||
"mmc0_data1",
|
||||
"mmc0_data4",
|
||||
"mmc0_data8",
|
||||
"mmc0_ctrl",
|
||||
};
|
||||
|
||||
static const char * const mmc1_groups[] = {
|
||||
"mmc1_data1",
|
||||
"mmc1_data4",
|
||||
"mmc1_data8",
|
||||
"mmc1_ctrl",
|
||||
};
|
||||
|
||||
static const char * const sdhi0_groups[] = {
|
||||
"sdhi0_data1",
|
||||
"sdhi0_data4",
|
||||
@ -2982,6 +2975,13 @@ static const char * const sdhi3_groups[] = {
|
||||
"sdhi3_wp",
|
||||
};
|
||||
|
||||
static const char * const tpu0_groups[] = {
|
||||
"tpu0_to0",
|
||||
"tpu0_to1",
|
||||
"tpu0_to2",
|
||||
"tpu0_to3",
|
||||
};
|
||||
|
||||
static const struct sh_pfc_function pinmux_functions[] = {
|
||||
SH_PFC_FUNCTION(eth),
|
||||
SH_PFC_FUNCTION(hscif0),
|
||||
|
||||
Loading…
Reference in New Issue
Block a user