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spi: dw: Enable interrupts in accordance with DMA xfer mode
It's pointless to track the Tx overrun interrupts if Rx-only SPI transfer is issued. Similarly there is no need in handling the Rx overrun/underrun interrupts if Tx-only SPI transfer is executed. So lets unmask the interrupts only if corresponding SPI transactions are implied. Co-developed-by: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru> Signed-off-by: Georgy Vlasov <Georgy.Vlasov@baikalelectronics.ru> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Cc: Ramil Zaripov <Ramil.Zaripov@baikalelectronics.ru> Cc: Alexey Malahov <Alexey.Malahov@baikalelectronics.ru> Cc: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Cc: Paul Burton <paulburton@kernel.org> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: linux-mips@vger.kernel.org Cc: devicetree@vger.kernel.org Link: https://lore.kernel.org/r/20200522000806.7381-3-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -243,19 +243,23 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws,
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static int mid_spi_dma_setup(struct dw_spi *dws, struct spi_transfer *xfer)
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{
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u16 dma_ctrl = 0;
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u16 imr = 0, dma_ctrl = 0;
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dw_writel(dws, DW_SPI_DMARDLR, 0xf);
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dw_writel(dws, DW_SPI_DMATDLR, 0x10);
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if (xfer->tx_buf)
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if (xfer->tx_buf) {
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dma_ctrl |= SPI_DMA_TDMAE;
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if (xfer->rx_buf)
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imr |= SPI_INT_TXOI;
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}
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if (xfer->rx_buf) {
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dma_ctrl |= SPI_DMA_RDMAE;
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imr |= SPI_INT_RXUI | SPI_INT_RXOI;
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}
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dw_writel(dws, DW_SPI_DMACR, dma_ctrl);
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/* Set the interrupt mask */
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spi_umask_intr(dws, SPI_INT_TXOI | SPI_INT_RXUI | SPI_INT_RXOI);
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spi_umask_intr(dws, imr);
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dws->transfer_handler = dma_transfer;
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