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drm/radeon/si/dpm: fix phase shedding setup
Used the wrong index to setup the phase shedding mask. Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Cc: stable@vger.kernel.org
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@ -4106,7 +4106,7 @@ static int si_populate_smc_voltage_tables(struct radeon_device *rdev,
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&rdev->pm.dpm.dyn_state.phase_shedding_limits_table)) {
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si_populate_smc_voltage_table(rdev, &si_pi->vddc_phase_shed_table, table);
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table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC] =
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table->phaseMaskTable.lowMask[SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING] =
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cpu_to_be32(si_pi->vddc_phase_shed_table.mask_low);
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si_write_smc_soft_register(rdev, SI_SMC_SOFT_REGISTER_phase_shedding_delay,
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@ -194,6 +194,7 @@ typedef struct SISLANDS_SMC_SWSTATE SISLANDS_SMC_SWSTATE;
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#define SISLANDS_SMC_VOLTAGEMASK_VDDC 0
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#define SISLANDS_SMC_VOLTAGEMASK_MVDD 1
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#define SISLANDS_SMC_VOLTAGEMASK_VDDCI 2
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#define SISLANDS_SMC_VOLTAGEMASK_VDDC_PHASE_SHEDDING 3
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#define SISLANDS_SMC_VOLTAGEMASK_MAX 4
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struct SISLANDS_SMC_VOLTAGEMASKTABLE
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