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habanalabs: Make the Coresight timestamp perpetual
The Coresight timestamp is enabled for a specific debug session using the HL_DEBUG_OP_TIMESTAMP opcode of the debug IOCTL. In order to have a perpetual timestamp that would be comparable between various debug sessions, this patch moves the timestamp enablement to be part of the HW initialization. The HL_DEBUG_OP_TIMESTAMP opcode turns to be deprecated and shouldn't be used. Old user-space that will call it won't see any change in the behavior of the debug session. Signed-off-by: Tomer Tayar <ttayar@habana.ai> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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@ -2062,6 +2062,25 @@ static void goya_disable_msix(struct hl_device *hdev)
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goya->hw_cap_initialized &= ~HW_CAP_MSIX;
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}
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static void goya_enable_timestamp(struct hl_device *hdev)
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{
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/* Disable the timestamp counter */
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);
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/* Zero the lower/upper parts of the 64-bit counter */
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);
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/* Enable the counter */
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);
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}
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static void goya_disable_timestamp(struct hl_device *hdev)
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{
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/* Disable the timestamp counter */
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);
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}
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static void goya_halt_engines(struct hl_device *hdev, bool hard_reset)
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{
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u32 wait_timeout_ms, cpu_timeout_ms;
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@ -2102,6 +2121,8 @@ static void goya_halt_engines(struct hl_device *hdev, bool hard_reset)
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goya_disable_external_queues(hdev);
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goya_disable_internal_queues(hdev);
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goya_disable_timestamp(hdev);
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if (hard_reset) {
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goya_disable_msix(hdev);
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goya_mmu_remove_device_cpu_mappings(hdev);
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@ -2504,6 +2525,8 @@ static int goya_hw_init(struct hl_device *hdev)
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goya_init_tpc_qmans(hdev);
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goya_enable_timestamp(hdev);
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/* MSI-X must be enabled before CPU queues are initialized */
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rc = goya_enable_msix(hdev);
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if (rc)
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@ -636,24 +636,11 @@ static int goya_config_spmu(struct hl_device *hdev,
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return 0;
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}
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static int goya_config_timestamp(struct hl_device *hdev,
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struct hl_debug_params *params)
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{
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);
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if (params->enable) {
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);
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WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);
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}
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return 0;
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}
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int goya_debug_coresight(struct hl_device *hdev, void *data)
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{
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struct hl_debug_params *params = data;
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u32 val;
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int rc;
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int rc = 0;
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switch (params->op) {
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case HL_DEBUG_OP_STM:
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@ -675,7 +662,7 @@ int goya_debug_coresight(struct hl_device *hdev, void *data)
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rc = goya_config_spmu(hdev, params);
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break;
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case HL_DEBUG_OP_TIMESTAMP:
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rc = goya_config_timestamp(hdev, params);
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/* Do nothing as this opcode is deprecated */
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break;
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default:
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@ -451,7 +451,7 @@ struct hl_debug_params_spmu {
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#define HL_DEBUG_OP_BMON 4
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/* Opcode for SPMU component */
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#define HL_DEBUG_OP_SPMU 5
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/* Opcode for timestamp */
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/* Opcode for timestamp (deprecated) */
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#define HL_DEBUG_OP_TIMESTAMP 6
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/* Opcode for setting the device into or out of debug mode. The enable
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* variable should be 1 for enabling debug mode and 0 for disabling it
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