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arm64: __clean_dcache_area_pou to take end parameter instead of size

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To be consistent with other functions with similar names and
functionality in cacheflush.h, cache.S, and cachetlb.rst, change
to specify the range in terms of start and end, as opposed to
start and size.

No functional change intended.

Reported-by: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20210524083001.2586635-16-tabba@google.com
Signed-off-by: Will Deacon <will@kernel.org>
This commit is contained in:
Fuad Tabba 2021-05-24 09:29:58 +01:00 committed by Will Deacon
parent f749448edb
commit 406d7d4e2b
3 changed files with 6 additions and 7 deletions
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2
arch/arm64/include/asm/cacheflush.h
View File

@ -62,7 +62,7 @@ extern void __flush_dcache_area(unsigned long start, unsigned long end);
extern void __inval_dcache_area(unsigned long start, unsigned long end);
extern void __clean_dcache_area_poc(unsigned long start, unsigned long end);
extern void __clean_dcache_area_pop(unsigned long start, unsigned long end);
extern void __clean_dcache_area_pou(void *addr, size_t len);
extern void __clean_dcache_area_pou(unsigned long start, unsigned long end);
extern long __flush_cache_user_range(unsigned long start, unsigned long end);
extern void sync_icache_aliases(void *kaddr, unsigned long len);

9
arch/arm64/mm/cache.S
View File

@ -113,20 +113,19 @@ SYM_FUNC_START_PI(__flush_dcache_area)
SYM_FUNC_END_PI(__flush_dcache_area)
/*
* __clean_dcache_area_pou(kaddr, size)
* __clean_dcache_area_pou(start, end)
*
* Ensure that any D-cache lines for the interval [kaddr, kaddr+size)
* Ensure that any D-cache lines for the interval [start, end)
* are cleaned to the PoU.
*
* - kaddr - kernel address
* - size - size in question
* - start - virtual start address of region
* - end - virtual end address of region
*/
SYM_FUNC_START(__clean_dcache_area_pou)
alternative_if ARM64_HAS_CACHE_IDC
dsb ishst
ret
alternative_else_nop_endif
add x1, x0, x1
dcache_by_line_op cvau, ish, x0, x1, x2, x3
ret
SYM_FUNC_END(__clean_dcache_area_pou)

2
arch/arm64/mm/flush.c
View File

@ -19,7 +19,7 @@ void sync_icache_aliases(void *kaddr, unsigned long len)
unsigned long addr = (unsigned long)kaddr;
if (icache_is_aliasing()) {
__clean_dcache_area_pou(kaddr, len);
__clean_dcache_area_pou(kaddr, kaddr + len);
__flush_icache_all();
} else {
/*