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ARM: bcm21664: Remove reset code
The kona reset driver now provides this functionality. Signed-off-by: Chris Brand <chris.brand@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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@ -11,53 +11,12 @@
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* GNU General Public License for more details.
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*/
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#include <linux/of_address.h>
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#include <linux/of_platform.h>
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#include <linux/io.h>
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#include <asm/mach/arch.h>
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#include "kona_l2_cache.h"
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#define RSTMGR_DT_STRING "brcm,bcm21664-resetmgr"
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#define RSTMGR_REG_WR_ACCESS_OFFSET 0
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#define RSTMGR_REG_CHIP_SOFT_RST_OFFSET 4
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#define RSTMGR_WR_PASSWORD 0xa5a5
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#define RSTMGR_WR_PASSWORD_SHIFT 8
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#define RSTMGR_WR_ACCESS_ENABLE 1
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static void bcm21664_restart(enum reboot_mode mode, const char *cmd)
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{
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void __iomem *base;
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struct device_node *resetmgr;
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resetmgr = of_find_compatible_node(NULL, NULL, RSTMGR_DT_STRING);
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if (!resetmgr) {
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pr_emerg("Couldn't find " RSTMGR_DT_STRING "\n");
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return;
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}
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base = of_iomap(resetmgr, 0);
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if (!base) {
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pr_emerg("Couldn't map " RSTMGR_DT_STRING "\n");
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return;
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}
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/*
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* A soft reset is triggered by writing a 0 to bit 0 of the soft reset
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* register. To write to that register we must first write the password
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* and the enable bit in the write access enable register.
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*/
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writel((RSTMGR_WR_PASSWORD << RSTMGR_WR_PASSWORD_SHIFT) |
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RSTMGR_WR_ACCESS_ENABLE,
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base + RSTMGR_REG_WR_ACCESS_OFFSET);
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writel(0, base + RSTMGR_REG_CHIP_SOFT_RST_OFFSET);
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/* Wait for reset */
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while (1);
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}
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static void __init bcm21664_init(void)
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{
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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@ -71,6 +30,5 @@ static const char * const bcm21664_dt_compat[] = {
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DT_MACHINE_START(BCM21664_DT, "BCM21664 Broadcom Application Processor")
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.init_machine = bcm21664_init,
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.restart = bcm21664_restart,
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.dt_compat = bcm21664_dt_compat,
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MACHINE_END
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