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powerpc/8xx: Enable 512k hugepage support with HW assistance
For using 512k pages with hardware assistance, the PTEs have to be spread every 128 bytes in the L2 table. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -74,7 +74,9 @@ static inline pte_t *hugepte_offset(hugepd_t hpd, unsigned long addr,
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unsigned long idx = 0;
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pte_t *dir = hugepd_page(hpd);
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#ifndef CONFIG_PPC_FSL_BOOK3E
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#ifdef CONFIG_PPC_8xx
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idx = (addr & ((1UL << pdshift) - 1)) >> PAGE_SHIFT;
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#elif !defined(CONFIG_PPC_FSL_BOOK3E)
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idx = (addr & ((1UL << pdshift) - 1)) >> hugepd_shift(hpd);
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#endif
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@ -65,6 +65,9 @@ static int __hugepte_alloc(struct mm_struct *mm, hugepd_t *hpdp,
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if (pshift >= pdshift) {
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cachep = PGT_CACHE(PTE_T_ORDER);
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num_hugepd = 1 << (pshift - pdshift);
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} else if (IS_ENABLED(CONFIG_PPC_8xx)) {
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cachep = PGT_CACHE(PTE_INDEX_SIZE);
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num_hugepd = 1;
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} else {
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cachep = PGT_CACHE(pdshift - pshift);
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num_hugepd = 1;
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@ -331,6 +334,9 @@ static void free_hugepd_range(struct mmu_gather *tlb, hugepd_t *hpdp, int pdshif
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if (shift >= pdshift)
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hugepd_free(tlb, hugepte);
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else if (IS_ENABLED(CONFIG_PPC_8xx))
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pgtable_free_tlb(tlb, hugepte,
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get_hugepd_cache_index(PTE_INDEX_SIZE));
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else
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pgtable_free_tlb(tlb, hugepte,
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get_hugepd_cache_index(pdshift - shift));
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@ -700,7 +706,9 @@ static int __init hugetlbpage_init(void)
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* if we have pdshift and shift value same, we don't
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* use pgt cache for hugepd.
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*/
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if (pdshift > shift)
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if (pdshift > shift && IS_ENABLED(CONFIG_PPC_8xx))
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pgtable_cache_add(PTE_INDEX_SIZE);
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else if (pdshift > shift)
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pgtable_cache_add(pdshift - shift);
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#if defined(CONFIG_PPC_FSL_BOOK3E) || defined(CONFIG_PPC_8xx)
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else
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@ -97,6 +97,9 @@ struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT] = {
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.shift = 14,
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},
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#endif
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[MMU_PAGE_512K] = {
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.shift = 19,
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},
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[MMU_PAGE_8M] = {
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.shift = 23,
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},
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