mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-11-20 08:38:24 +08:00
mach-ux500: board support for AB8500 GPIO driver
This is the board support patch for ab8500 gpio driver on mach-ux500.Patch implements 16 virtual IRQ mapped to 16 interrupt capable AB8500 GPIOs. Signed-off-by: Bibek Basu <bibek.basu@stericsson.com> [Modify for header file placement] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
parent
0cb3fcd72c
commit
3ef374a22b
@ -22,6 +22,7 @@
|
||||
#include <linux/mfd/ab8500.h>
|
||||
#include <linux/regulator/ab8500.h>
|
||||
#include <linux/mfd/tc3589x.h>
|
||||
#include <linux/mfd/ab8500/gpio.h>
|
||||
#include <linux/leds-lp5521.h>
|
||||
#include <linux/input.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
@ -42,10 +43,33 @@
|
||||
#include "board-mop500.h"
|
||||
#include "board-mop500-regulators.h"
|
||||
|
||||
static struct ab8500_gpio_platform_data ab8500_gpio_pdata = {
|
||||
.gpio_base = MOP500_AB8500_GPIO(0),
|
||||
.irq_base = MOP500_AB8500_VIR_GPIO_IRQ_BASE,
|
||||
/* config_reg is the initial configuration of ab8500 pins.
|
||||
* The pins can be configured as GPIO or alt functions based
|
||||
* on value present in GpioSel1 to GpioSel6 and AlternatFunction
|
||||
* register. This is the array of 7 configuration settings.
|
||||
* One has to compile time decide these settings. Below is the
|
||||
* explaination of these setting
|
||||
* GpioSel1 = 0x00 => Pins GPIO1 to GPIO8 are not used as GPIO
|
||||
* GpioSel2 = 0x1E => Pins GPIO10 to GPIO13 are configured as GPIO
|
||||
* GpioSel3 = 0x80 => Pin GPIO24 is configured as GPIO
|
||||
* GpioSel4 = 0x01 => Pin GPIo25 is configured as GPIO
|
||||
* GpioSel5 = 0x7A => Pins GPIO34, GPIO36 to GPIO39 are conf as GPIO
|
||||
* GpioSel6 = 0x00 => Pins GPIO41 & GPIo42 are not configured as GPIO
|
||||
* AlternaFunction = 0x00 => If Pins GPIO10 to 13 are not configured
|
||||
* as GPIO then this register selectes the alternate fucntions
|
||||
*/
|
||||
.config_reg = {0x00, 0x1E, 0x80, 0x01,
|
||||
0x7A, 0x00, 0x00},
|
||||
};
|
||||
|
||||
static struct ab8500_platform_data ab8500_platdata = {
|
||||
.irq_base = MOP500_AB8500_IRQ_BASE,
|
||||
.regulator = ab8500_regulators,
|
||||
.num_regulator = ARRAY_SIZE(ab8500_regulators),
|
||||
.gpio = &ab8500_gpio_pdata,
|
||||
};
|
||||
|
||||
static struct resource ab8500_resources[] = {
|
||||
|
@ -27,6 +27,10 @@
|
||||
#define GPIO_BU21013_CS MOP500_EGPIO(13)
|
||||
#define GPIO_SDMMC_EN MOP500_EGPIO(17)
|
||||
#define GPIO_SDMMC_1V8_3V_SEL MOP500_EGPIO(18)
|
||||
#define MOP500_EGPIO_END MOP500_EGPIO(24)
|
||||
|
||||
/* GPIOs on the AB8500 mixed-signals circuit */
|
||||
#define MOP500_AB8500_GPIO(x) (MOP500_EGPIO_END + (x))
|
||||
|
||||
struct i2c_board_info;
|
||||
|
||||
|
@ -35,9 +35,20 @@
|
||||
#define MOP500_STMPE1601_IRQBASE MOP500_EGPIO_IRQ_END
|
||||
#define MOP500_STMPE1601_IRQ(x) (MOP500_STMPE1601_IRQBASE + (x))
|
||||
|
||||
#define MOP500_NR_IRQS MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
|
||||
#define MOP500_STMPE1601_IRQ_END \
|
||||
MOP500_STMPE1601_IRQ(STMPE_NR_INTERNAL_IRQS)
|
||||
|
||||
#define MOP500_IRQ_END MOP500_NR_IRQS
|
||||
/* AB8500 virtual gpio IRQ */
|
||||
#define AB8500_VIR_GPIO_NR_IRQS 16
|
||||
|
||||
#define MOP500_AB8500_VIR_GPIO_IRQ_BASE \
|
||||
MOP500_STMPE1601_IRQ_END
|
||||
#define MOP500_AB8500_VIR_GPIO_IRQ_END \
|
||||
(MOP500_AB8500_VIR_GPIO_IRQ_BASE + AB8500_VIR_GPIO_NR_IRQS)
|
||||
|
||||
#define MOP500_NR_IRQS MOP500_AB8500_VIR_GPIO_IRQ_END
|
||||
|
||||
#define MOP500_IRQ_END MOP500_NR_IRQS
|
||||
|
||||
#if MOP500_IRQ_END > IRQ_BOARD_END
|
||||
#undef IRQ_BOARD_END
|
||||
|
Loading…
Reference in New Issue
Block a user