mirror of
https://github.com/edk2-porting/linux-next.git
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Blackfin: DNP5370: new board port
Signed-off-by: Andreas Schallenberg <Andreas.Schallenberg@3alitydigital.de> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Andreas Schallenberg
Mike Frysinger
parent
d57bc0feaa
commit
3ea9f2bf5a
121
arch/blackfin/configs/DNP5370_defconfig
Normal file
121
arch/blackfin/configs/DNP5370_defconfig
Normal file
@ -0,0 +1,121 @@
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CONFIG_EXPERIMENTAL=y
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CONFIG_LOCALVERSION="DNP5370"
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CONFIG_SYSVIPC=y
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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CONFIG_LOG_BUF_SHIFT=14
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_EMBEDDED=y
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CONFIG_SLOB=y
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# CONFIG_BLK_DEV_BSG is not set
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# CONFIG_IOSCHED_CFQ is not set
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CONFIG_BF537=y
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CONFIG_BF_REV_0_3=y
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CONFIG_DNP5370=y
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CONFIG_IRQ_ERROR=7
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# CONFIG_CYCLES_CLOCKSOURCE is not set
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CONFIG_C_CDPRIO=y
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CONFIG_C_AMBEN_B0_B1_B2=y
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CONFIG_PM=y
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# CONFIG_SUSPEND is not set
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_UNIX=y
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CONFIG_INET=y
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CONFIG_IP_PNP=y
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CONFIG_IP_PNP_RARP=y
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CONFIG_SYN_COOKIES=y
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# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
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# CONFIG_INET_XFRM_MODE_TUNNEL is not set
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# CONFIG_INET_XFRM_MODE_BEET is not set
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# CONFIG_INET_LRO is not set
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# CONFIG_INET_DIAG is not set
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# CONFIG_IPV6 is not set
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CONFIG_LLC2=y
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CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
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CONFIG_MTD=y
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CONFIG_MTD_DEBUG=y
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CONFIG_MTD_DEBUG_VERBOSE=1
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CONFIG_MTD_PARTITIONS=y
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CONFIG_MTD_CHAR=y
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CONFIG_MTD_BLOCK=y
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CONFIG_NFTL=y
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CONFIG_NFTL_RW=y
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CONFIG_MTD_CFI=y
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CONFIG_MTD_CFI_AMDSTD=y
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CONFIG_MTD_ROM=y
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CONFIG_MTD_ABSENT=y
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CONFIG_MTD_COMPLEX_MAPPINGS=y
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CONFIG_MTD_PHYSMAP=y
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CONFIG_MTD_UCLINUX=y
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CONFIG_MTD_PLATRAM=y
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CONFIG_MTD_DATAFLASH=y
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CONFIG_MTD_BLOCK2MTD=y
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CONFIG_MTD_NAND=y
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CONFIG_MTD_NAND_PLATFORM=y
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CONFIG_BLK_DEV_LOOP=y
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CONFIG_BLK_DEV_RAM=y
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# CONFIG_MISC_DEVICES is not set
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CONFIG_NETDEVICES=y
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CONFIG_DAVICOM_PHY=y
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CONFIG_NET_ETHERNET=y
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CONFIG_BFIN_MAC=y
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# CONFIG_NETDEV_1000 is not set
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# CONFIG_NETDEV_10000 is not set
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# CONFIG_WLAN is not set
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# CONFIG_INPUT is not set
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# CONFIG_SERIO is not set
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# CONFIG_BFIN_DMA_INTERFACE is not set
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# CONFIG_VT is not set
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# CONFIG_DEVKMEM is not set
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CONFIG_BFIN_JTAG_COMM=y
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CONFIG_BFIN_JTAG_COMM_CONSOLE=y
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CONFIG_SERIAL_BFIN=y
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CONFIG_SERIAL_BFIN_CONSOLE=y
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CONFIG_SERIAL_BFIN_UART0=y
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CONFIG_LEGACY_PTY_COUNT=64
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# CONFIG_HW_RANDOM is not set
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CONFIG_I2C=y
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CONFIG_I2C_CHARDEV=y
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CONFIG_I2C_BLACKFIN_TWI=y
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CONFIG_SPI=y
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CONFIG_SPI_BFIN=y
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CONFIG_SPI_SPIDEV=y
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CONFIG_GPIOLIB=y
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CONFIG_GPIO_SYSFS=y
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CONFIG_SENSORS_LM75=y
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# CONFIG_USB_SUPPORT is not set
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CONFIG_MMC=y
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CONFIG_MMC_SPI=y
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CONFIG_DMADEVICES=y
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CONFIG_EXT2_FS=y
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CONFIG_EXT2_FS_XATTR=y
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# CONFIG_DNOTIFY is not set
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CONFIG_MSDOS_FS=y
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CONFIG_VFAT_FS=y
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CONFIG_FAT_DEFAULT_CODEPAGE=850
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CONFIG_JFFS2_FS=y
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CONFIG_CRAMFS=y
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CONFIG_ROMFS_FS=y
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CONFIG_ROMFS_BACKED_BY_BOTH=y
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# CONFIG_NETWORK_FILESYSTEMS is not set
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CONFIG_NLS_CODEPAGE_437=y
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CONFIG_NLS_CODEPAGE_850=y
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CONFIG_NLS_ISO8859_1=y
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CONFIG_DEBUG_KERNEL=y
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CONFIG_DEBUG_SHIRQ=y
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CONFIG_DETECT_HUNG_TASK=y
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CONFIG_DEBUG_OBJECTS=y
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CONFIG_DEBUG_LOCK_ALLOC=y
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CONFIG_DEBUG_KOBJECT=y
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CONFIG_DEBUG_INFO=y
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CONFIG_DEBUG_VM=y
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CONFIG_DEBUG_MEMORY_INIT=y
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CONFIG_DEBUG_LIST=y
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# CONFIG_RCU_CPU_STALL_DETECTOR is not set
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CONFIG_SYSCTL_SYSCALL_CHECK=y
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CONFIG_PAGE_POISONING=y
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# CONFIG_FTRACE is not set
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CONFIG_DEBUG_DOUBLEFAULT=y
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CONFIG_CPLB_INFO=y
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CONFIG_CRC_CCITT=y
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@ -39,4 +39,10 @@ config CAMSIG_MINOTAUR
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help
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Board supply package for CSP Minotaur
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config DNP5370
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bool "SSV Dil/NetPC DNP/5370"
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depends on (BF537)
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help
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Board supply package for DNP/5370 DIL64 module
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endchoice
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@ -8,3 +8,4 @@ obj-$(CONFIG_BFIN537_BLUETECHNIX_CM_U) += cm_bf537u.o
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obj-$(CONFIG_BFIN537_BLUETECHNIX_TCM) += tcm_bf537.o
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obj-$(CONFIG_PNAV10) += pnav10.o
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obj-$(CONFIG_CAMSIG_MINOTAUR) += minotaur.o
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obj-$(CONFIG_DNP5370) += dnp5370.o
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418
arch/blackfin/mach-bf537/boards/dnp5370.c
Normal file
418
arch/blackfin/mach-bf537/boards/dnp5370.c
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@ -0,0 +1,418 @@
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/*
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* This is the configuration for SSV Dil/NetPC DNP/5370 board.
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*
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* DIL module: http://www.dilnetpc.com/dnp0086.htm
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* SK28 (starter kit): http://www.dilnetpc.com/dnp0088.htm
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*
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* Copyright 2010 3ality Digital Systems
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* Copyright 2005 National ICT Australia (NICTA)
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* Copyright 2004-2006 Analog Devices Inc.
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/plat-ram.h>
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#include <linux/mtd/physmap.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/i2c.h>
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#include <linux/spi/mmc_spi.h>
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#include <linux/phy.h>
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#include <asm/dma.h>
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#include <asm/bfin5xx_spi.h>
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#include <asm/reboot.h>
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#include <asm/portmux.h>
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#include <asm/dpmc.h>
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/*
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* Name the Board for the /proc/cpuinfo
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*/
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const char bfin_board_name[] = "DNP/5370";
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#define FLASH_MAC 0x202f0000
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#define CONFIG_MTD_PHYSMAP_LEN 0x300000
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#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
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static struct platform_device rtc_device = {
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.name = "rtc-bfin",
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.id = -1,
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};
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#endif
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#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
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#include <linux/bfin_mac.h>
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static const unsigned short bfin_mac_peripherals[] = P_RMII0;
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static struct bfin_phydev_platform_data bfin_phydev_data[] = {
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{
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.addr = 1,
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.irq = PHY_POLL, /* IRQ_MAC_PHYINT */
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},
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};
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static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
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.phydev_number = 1,
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.phydev_data = bfin_phydev_data,
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.phy_mode = PHY_INTERFACE_MODE_RMII,
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.mac_peripherals = bfin_mac_peripherals,
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};
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static struct platform_device bfin_mii_bus = {
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.name = "bfin_mii_bus",
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.dev = {
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.platform_data = &bfin_mii_bus_data,
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}
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};
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static struct platform_device bfin_mac_device = {
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.name = "bfin_mac",
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.dev = {
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.platform_data = &bfin_mii_bus,
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}
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};
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#endif
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#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
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static struct mtd_partition asmb_flash_partitions[] = {
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{
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.name = "bootloader(nor)",
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.size = 0x30000,
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.offset = 0,
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}, {
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.name = "linux kernel and rootfs(nor)",
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.size = 0x300000 - 0x30000 - 0x10000,
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.offset = MTDPART_OFS_APPEND,
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}, {
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.name = "MAC address(nor)",
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.size = 0x10000,
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.offset = MTDPART_OFS_APPEND,
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.mask_flags = MTD_WRITEABLE,
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}
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};
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static struct physmap_flash_data asmb_flash_data = {
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.width = 1,
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.parts = asmb_flash_partitions,
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.nr_parts = ARRAY_SIZE(asmb_flash_partitions),
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};
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static struct resource asmb_flash_resource = {
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.start = 0x20000000,
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.end = 0x202fffff,
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.flags = IORESOURCE_MEM,
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};
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/* 4 MB NOR flash attached to async memory banks 0-2,
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* therefore only 3 MB visible.
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*/
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static struct platform_device asmb_flash_device = {
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.name = "physmap-flash",
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.id = 0,
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.dev = {
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.platform_data = &asmb_flash_data,
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},
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.num_resources = 1,
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.resource = &asmb_flash_resource,
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};
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#endif
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#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
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#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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#define MMC_SPI_CARD_DETECT_INT IRQ_PF5
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static int bfin_mmc_spi_init(struct device *dev,
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irqreturn_t (*detect_int)(int, void *), void *data)
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{
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return request_irq(MMC_SPI_CARD_DETECT_INT, detect_int,
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IRQF_TRIGGER_FALLING, "mmc-spi-detect", data);
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}
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static void bfin_mmc_spi_exit(struct device *dev, void *data)
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{
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free_irq(MMC_SPI_CARD_DETECT_INT, data);
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}
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static struct bfin5xx_spi_chip mmc_spi_chip_info = {
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.enable_dma = 0, /* use no dma transfer with this chip*/
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.bits_per_word = 8,
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};
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static struct mmc_spi_platform_data bfin_mmc_spi_pdata = {
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.init = bfin_mmc_spi_init,
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.exit = bfin_mmc_spi_exit,
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.detect_delay = 100, /* msecs */
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};
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#endif
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#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
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/* This mapping is for at45db642 it has 1056 page size,
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* partition size and offset should be page aligned
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*/
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static struct mtd_partition bfin_spi_dataflash_partitions[] = {
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{
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.name = "JFFS2 dataflash(nor)",
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#ifdef CONFIG_MTD_PAGESIZE_1024
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.offset = 0x40000,
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.size = 0x7C0000,
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#else
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.offset = 0x0,
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.size = 0x840000,
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#endif
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}
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};
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static struct flash_platform_data bfin_spi_dataflash_data = {
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.name = "mtd_dataflash",
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.parts = bfin_spi_dataflash_partitions,
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.nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
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.type = "mtd_dataflash",
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};
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static struct bfin5xx_spi_chip spi_dataflash_chip_info = {
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.enable_dma = 0, /* use no dma transfer with this chip*/
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.bits_per_word = 8,
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};
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#endif
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static struct spi_board_info bfin_spi_board_info[] __initdata = {
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/* SD/MMC card reader at SPI bus */
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#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
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{
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.modalias = "mmc_spi",
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.max_speed_hz = 20000000,
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.bus_num = 0,
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.chip_select = 1,
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.platform_data = &bfin_mmc_spi_pdata,
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.controller_data = &mmc_spi_chip_info,
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.mode = SPI_MODE_3,
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},
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#endif
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/* 8 Megabyte Atmel NOR flash chip at SPI bus */
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#if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
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{
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.modalias = "mtd_dataflash",
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.max_speed_hz = 16700000,
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.bus_num = 0,
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.chip_select = 2,
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.platform_data = &bfin_spi_dataflash_data,
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.controller_data = &spi_dataflash_chip_info,
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.mode = SPI_MODE_3, /* SPI_CPHA and SPI_CPOL */
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},
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#endif
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};
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/* SPI controller data */
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/* SPI (0) */
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static struct resource bfin_spi0_resource[] = {
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[0] = {
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.start = SPI0_REGBASE,
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.end = SPI0_REGBASE + 0xFF,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = CH_SPI,
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.end = CH_SPI,
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.flags = IORESOURCE_DMA,
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},
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[2] = {
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.start = IRQ_SPI,
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.end = IRQ_SPI,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct bfin5xx_spi_master spi_bfin_master_info = {
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.num_chipselect = 8,
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.enable_dma = 1, /* master has the ability to do dma transfer */
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.pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
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};
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static struct platform_device spi_bfin_master_device = {
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.name = "bfin-spi",
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.id = 0, /* Bus number */
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.num_resources = ARRAY_SIZE(bfin_spi0_resource),
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.resource = bfin_spi0_resource,
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.dev = {
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.platform_data = &spi_bfin_master_info, /* Passed to driver */
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},
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};
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#endif
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#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
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#ifdef CONFIG_SERIAL_BFIN_UART0
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static struct resource bfin_uart0_resources[] = {
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{
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.start = UART0_THR,
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.end = UART0_GCTL+2,
|
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.flags = IORESOURCE_MEM,
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},
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{
|
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.start = IRQ_UART0_RX,
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.end = IRQ_UART0_RX+1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = IRQ_UART0_ERROR,
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.end = IRQ_UART0_ERROR,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = CH_UART0_TX,
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.end = CH_UART0_TX,
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.flags = IORESOURCE_DMA,
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},
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{
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.start = CH_UART0_RX,
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.end = CH_UART0_RX,
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.flags = IORESOURCE_DMA,
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},
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};
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static unsigned short bfin_uart0_peripherals[] = {
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P_UART0_TX, P_UART0_RX, 0
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};
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static struct platform_device bfin_uart0_device = {
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.name = "bfin-uart",
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.id = 0,
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.num_resources = ARRAY_SIZE(bfin_uart0_resources),
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.resource = bfin_uart0_resources,
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.dev = {
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.platform_data = &bfin_uart0_peripherals, /* Passed to driver */
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},
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};
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#endif
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#ifdef CONFIG_SERIAL_BFIN_UART1
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static struct resource bfin_uart1_resources[] = {
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{
|
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.start = UART1_THR,
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.end = UART1_GCTL+2,
|
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.flags = IORESOURCE_MEM,
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},
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{
|
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.start = IRQ_UART1_RX,
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.end = IRQ_UART1_RX+1,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = IRQ_UART1_ERROR,
|
||||
.end = IRQ_UART1_ERROR,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
.start = CH_UART1_TX,
|
||||
.end = CH_UART1_TX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
{
|
||||
.start = CH_UART1_RX,
|
||||
.end = CH_UART1_RX,
|
||||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
|
||||
static unsigned short bfin_uart1_peripherals[] = {
|
||||
P_UART1_TX, P_UART1_RX, 0
|
||||
};
|
||||
|
||||
static struct platform_device bfin_uart1_device = {
|
||||
.name = "bfin-uart",
|
||||
.id = 1,
|
||||
.num_resources = ARRAY_SIZE(bfin_uart1_resources),
|
||||
.resource = bfin_uart1_resources,
|
||||
.dev = {
|
||||
.platform_data = &bfin_uart1_peripherals, /* Passed to driver */
|
||||
},
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
static struct resource bfin_twi0_resource[] = {
|
||||
[0] = {
|
||||
.start = TWI0_REGBASE,
|
||||
.end = TWI0_REGBASE + 0xff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = IRQ_TWI,
|
||||
.end = IRQ_TWI,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static struct platform_device i2c_bfin_twi_device = {
|
||||
.name = "i2c-bfin-twi",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(bfin_twi0_resource),
|
||||
.resource = bfin_twi0_resource,
|
||||
};
|
||||
#endif
|
||||
|
||||
static struct platform_device *dnp5370_devices[] __initdata = {
|
||||
|
||||
#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART0
|
||||
&bfin_uart0_device,
|
||||
#endif
|
||||
#ifdef CONFIG_SERIAL_BFIN_UART1
|
||||
&bfin_uart1_device,
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
|
||||
&asmb_flash_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
|
||||
&bfin_mii_bus,
|
||||
&bfin_mac_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
|
||||
&spi_bfin_master_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
|
||||
&i2c_bfin_twi_device,
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
|
||||
&rtc_device,
|
||||
#endif
|
||||
|
||||
};
|
||||
|
||||
static int __init dnp5370_init(void)
|
||||
{
|
||||
printk(KERN_INFO "DNP/5370: registering device resources\n");
|
||||
platform_add_devices(dnp5370_devices, ARRAY_SIZE(dnp5370_devices));
|
||||
printk(KERN_INFO "DNP/5370: registering %zu SPI slave devices\n",
|
||||
ARRAY_SIZE(bfin_spi_board_info));
|
||||
spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
|
||||
printk(KERN_INFO "DNP/5370: MAC %pM\n", (void *)FLASH_MAC);
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(dnp5370_init);
|
||||
|
||||
/*
|
||||
* Currently the MAC address is saved in Flash by U-Boot
|
||||
*/
|
||||
void bfin_get_ether_addr(char *addr)
|
||||
{
|
||||
*(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
|
||||
*(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
|
||||
}
|
||||
EXPORT_SYMBOL(bfin_get_ether_addr);
|
||||
Loading…
Reference in New Issue
Block a user