mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-16 09:13:55 +08:00
Merge branch 'late-for-linus' of git://git.linaro.org/people/rmk/linux-arm
Pull ARM update from Russell King: "This is the final round of stuff for ARM, left until the end of the merge window to reduce the number of conflicts. This set contains the ARM part of David Howells UAPI changes, and a fix to the ordering of 'select' statements in ARM Kconfig files (see the appropriate commit for why this happened - thanks to Andrew Morton for pointing out the problem.) I've left this as long as I dare for this window to avoid conflicts, and I regenerated the config patch yesterday, posting it to our mailing list for review and testing. I have several acks which include successful test reports for it. However, today I notice we've got new conflicts with previously unseen code... though that conflict should be trivial (it's my changes vs a one liner.)" * 'late-for-linus' of git://git.linaro.org/people/rmk/linux-arm: ARM: config: make sure that platforms are ordered by option string ARM: config: sort select statements alphanumerically UAPI: (Scripted) Disintegrate arch/arm/include/asm Fix up fairly conflict in arch/arm/Kconfig (the select re-organization vs recent addition of GENERIC_KERNEL_EXECVE)
This commit is contained in:
Linus Torvalds
commit
3d6ee36dfb
487
arch/arm/Kconfig
487
arch/arm/Kconfig
File diff suppressed because it is too large
Load Diff
@ -1,15 +1,15 @@
|
||||
config ARM_GIC
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||||
bool
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||||
select IRQ_DOMAIN
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||||
select MULTI_IRQ_HANDLER
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||||
bool
|
||||
|
||||
config GIC_NON_BANKED
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||||
bool
|
||||
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||||
config ARM_VIC
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||||
bool
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||||
select IRQ_DOMAIN
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||||
select MULTI_IRQ_HANDLER
|
||||
bool
|
||||
|
||||
config ARM_VIC_NR
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||||
int
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||||
|
||||
@ -1,6 +1,4 @@
|
||||
include include/asm-generic/Kbuild.asm
|
||||
|
||||
header-y += hwcap.h
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||||
|
||||
generic-y += auxvec.h
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||||
generic-y += bitsperlong.h
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||||
|
||||
@ -1,31 +1,8 @@
|
||||
#ifndef __ASMARM_HWCAP_H
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||||
#define __ASMARM_HWCAP_H
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||||
|
||||
/*
|
||||
* HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
|
||||
*/
|
||||
#define HWCAP_SWP (1 << 0)
|
||||
#define HWCAP_HALF (1 << 1)
|
||||
#define HWCAP_THUMB (1 << 2)
|
||||
#define HWCAP_26BIT (1 << 3) /* Play it safe */
|
||||
#define HWCAP_FAST_MULT (1 << 4)
|
||||
#define HWCAP_FPA (1 << 5)
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||||
#define HWCAP_VFP (1 << 6)
|
||||
#define HWCAP_EDSP (1 << 7)
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#define HWCAP_JAVA (1 << 8)
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#define HWCAP_IWMMXT (1 << 9)
|
||||
#define HWCAP_CRUNCH (1 << 10)
|
||||
#define HWCAP_THUMBEE (1 << 11)
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#define HWCAP_NEON (1 << 12)
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#define HWCAP_VFPv3 (1 << 13)
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#define HWCAP_VFPv3D16 (1 << 14)
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#define HWCAP_TLS (1 << 15)
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#define HWCAP_VFPv4 (1 << 16)
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#define HWCAP_IDIVA (1 << 17)
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#define HWCAP_IDIVT (1 << 18)
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#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
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#include <uapi/asm/hwcap.h>
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|
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#if defined(__KERNEL__)
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#if !defined(__ASSEMBLY__)
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/*
|
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* This yields a mask that user programs can use to figure out what
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||||
@ -35,5 +12,3 @@
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extern unsigned int elf_hwcap;
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#endif
|
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#endif
|
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|
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#endif
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|
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@ -10,133 +10,12 @@
|
||||
#ifndef __ASM_ARM_PTRACE_H
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#define __ASM_ARM_PTRACE_H
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|
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#include <asm/hwcap.h>
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|
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#define PTRACE_GETREGS 12
|
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#define PTRACE_SETREGS 13
|
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#define PTRACE_GETFPREGS 14
|
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#define PTRACE_SETFPREGS 15
|
||||
/* PTRACE_ATTACH is 16 */
|
||||
/* PTRACE_DETACH is 17 */
|
||||
#define PTRACE_GETWMMXREGS 18
|
||||
#define PTRACE_SETWMMXREGS 19
|
||||
/* 20 is unused */
|
||||
#define PTRACE_OLDSETOPTIONS 21
|
||||
#define PTRACE_GET_THREAD_AREA 22
|
||||
#define PTRACE_SET_SYSCALL 23
|
||||
/* PTRACE_SYSCALL is 24 */
|
||||
#define PTRACE_GETCRUNCHREGS 25
|
||||
#define PTRACE_SETCRUNCHREGS 26
|
||||
#define PTRACE_GETVFPREGS 27
|
||||
#define PTRACE_SETVFPREGS 28
|
||||
#define PTRACE_GETHBPREGS 29
|
||||
#define PTRACE_SETHBPREGS 30
|
||||
|
||||
/*
|
||||
* PSR bits
|
||||
*/
|
||||
#define USR26_MODE 0x00000000
|
||||
#define FIQ26_MODE 0x00000001
|
||||
#define IRQ26_MODE 0x00000002
|
||||
#define SVC26_MODE 0x00000003
|
||||
#define USR_MODE 0x00000010
|
||||
#define FIQ_MODE 0x00000011
|
||||
#define IRQ_MODE 0x00000012
|
||||
#define SVC_MODE 0x00000013
|
||||
#define ABT_MODE 0x00000017
|
||||
#define HYP_MODE 0x0000001a
|
||||
#define UND_MODE 0x0000001b
|
||||
#define SYSTEM_MODE 0x0000001f
|
||||
#define MODE32_BIT 0x00000010
|
||||
#define MODE_MASK 0x0000001f
|
||||
#define PSR_T_BIT 0x00000020
|
||||
#define PSR_F_BIT 0x00000040
|
||||
#define PSR_I_BIT 0x00000080
|
||||
#define PSR_A_BIT 0x00000100
|
||||
#define PSR_E_BIT 0x00000200
|
||||
#define PSR_J_BIT 0x01000000
|
||||
#define PSR_Q_BIT 0x08000000
|
||||
#define PSR_V_BIT 0x10000000
|
||||
#define PSR_C_BIT 0x20000000
|
||||
#define PSR_Z_BIT 0x40000000
|
||||
#define PSR_N_BIT 0x80000000
|
||||
|
||||
/*
|
||||
* Groups of PSR bits
|
||||
*/
|
||||
#define PSR_f 0xff000000 /* Flags */
|
||||
#define PSR_s 0x00ff0000 /* Status */
|
||||
#define PSR_x 0x0000ff00 /* Extension */
|
||||
#define PSR_c 0x000000ff /* Control */
|
||||
|
||||
/*
|
||||
* ARMv7 groups of PSR bits
|
||||
*/
|
||||
#define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */
|
||||
#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
|
||||
#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
|
||||
#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
|
||||
|
||||
/*
|
||||
* Default endianness state
|
||||
*/
|
||||
#ifdef CONFIG_CPU_ENDIAN_BE8
|
||||
#define PSR_ENDSTATE PSR_E_BIT
|
||||
#else
|
||||
#define PSR_ENDSTATE 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These are 'magic' values for PTRACE_PEEKUSR that return info about where a
|
||||
* process is located in memory.
|
||||
*/
|
||||
#define PT_TEXT_ADDR 0x10000
|
||||
#define PT_DATA_ADDR 0x10004
|
||||
#define PT_TEXT_END_ADDR 0x10008
|
||||
#include <uapi/asm/ptrace.h>
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* This struct defines the way the registers are stored on the
|
||||
* stack during a system call. Note that sizeof(struct pt_regs)
|
||||
* has to be a multiple of 8.
|
||||
*/
|
||||
#ifndef __KERNEL__
|
||||
struct pt_regs {
|
||||
long uregs[18];
|
||||
};
|
||||
#else /* __KERNEL__ */
|
||||
struct pt_regs {
|
||||
unsigned long uregs[18];
|
||||
};
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#define ARM_cpsr uregs[16]
|
||||
#define ARM_pc uregs[15]
|
||||
#define ARM_lr uregs[14]
|
||||
#define ARM_sp uregs[13]
|
||||
#define ARM_ip uregs[12]
|
||||
#define ARM_fp uregs[11]
|
||||
#define ARM_r10 uregs[10]
|
||||
#define ARM_r9 uregs[9]
|
||||
#define ARM_r8 uregs[8]
|
||||
#define ARM_r7 uregs[7]
|
||||
#define ARM_r6 uregs[6]
|
||||
#define ARM_r5 uregs[5]
|
||||
#define ARM_r4 uregs[4]
|
||||
#define ARM_r3 uregs[3]
|
||||
#define ARM_r2 uregs[2]
|
||||
#define ARM_r1 uregs[1]
|
||||
#define ARM_r0 uregs[0]
|
||||
#define ARM_ORIG_r0 uregs[17]
|
||||
|
||||
/*
|
||||
* The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
|
||||
* and core dumps.
|
||||
*/
|
||||
#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define user_mode(regs) \
|
||||
(((regs)->ARM_cpsr & 0xf) == 0)
|
||||
@ -260,9 +139,5 @@ static inline unsigned long user_stack_pointer(struct pt_regs *regs)
|
||||
(struct pt_regs *)((sp | (THREAD_SIZE - 1)) - 7) - 1; \
|
||||
})
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
@ -14,176 +14,8 @@
|
||||
#ifndef __ASMARM_SETUP_H
|
||||
#define __ASMARM_SETUP_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <uapi/asm/setup.h>
|
||||
|
||||
#define COMMAND_LINE_SIZE 1024
|
||||
|
||||
/* The list ends with an ATAG_NONE node. */
|
||||
#define ATAG_NONE 0x00000000
|
||||
|
||||
struct tag_header {
|
||||
__u32 size;
|
||||
__u32 tag;
|
||||
};
|
||||
|
||||
/* The list must start with an ATAG_CORE node */
|
||||
#define ATAG_CORE 0x54410001
|
||||
|
||||
struct tag_core {
|
||||
__u32 flags; /* bit 0 = read-only */
|
||||
__u32 pagesize;
|
||||
__u32 rootdev;
|
||||
};
|
||||
|
||||
/* it is allowed to have multiple ATAG_MEM nodes */
|
||||
#define ATAG_MEM 0x54410002
|
||||
|
||||
struct tag_mem32 {
|
||||
__u32 size;
|
||||
__u32 start; /* physical start address */
|
||||
};
|
||||
|
||||
/* VGA text type displays */
|
||||
#define ATAG_VIDEOTEXT 0x54410003
|
||||
|
||||
struct tag_videotext {
|
||||
__u8 x;
|
||||
__u8 y;
|
||||
__u16 video_page;
|
||||
__u8 video_mode;
|
||||
__u8 video_cols;
|
||||
__u16 video_ega_bx;
|
||||
__u8 video_lines;
|
||||
__u8 video_isvga;
|
||||
__u16 video_points;
|
||||
};
|
||||
|
||||
/* describes how the ramdisk will be used in kernel */
|
||||
#define ATAG_RAMDISK 0x54410004
|
||||
|
||||
struct tag_ramdisk {
|
||||
__u32 flags; /* bit 0 = load, bit 1 = prompt */
|
||||
__u32 size; /* decompressed ramdisk size in _kilo_ bytes */
|
||||
__u32 start; /* starting block of floppy-based RAM disk image */
|
||||
};
|
||||
|
||||
/* describes where the compressed ramdisk image lives (virtual address) */
|
||||
/*
|
||||
* this one accidentally used virtual addresses - as such,
|
||||
* it's deprecated.
|
||||
*/
|
||||
#define ATAG_INITRD 0x54410005
|
||||
|
||||
/* describes where the compressed ramdisk image lives (physical address) */
|
||||
#define ATAG_INITRD2 0x54420005
|
||||
|
||||
struct tag_initrd {
|
||||
__u32 start; /* physical start address */
|
||||
__u32 size; /* size of compressed ramdisk image in bytes */
|
||||
};
|
||||
|
||||
/* board serial number. "64 bits should be enough for everybody" */
|
||||
#define ATAG_SERIAL 0x54410006
|
||||
|
||||
struct tag_serialnr {
|
||||
__u32 low;
|
||||
__u32 high;
|
||||
};
|
||||
|
||||
/* board revision */
|
||||
#define ATAG_REVISION 0x54410007
|
||||
|
||||
struct tag_revision {
|
||||
__u32 rev;
|
||||
};
|
||||
|
||||
/* initial values for vesafb-type framebuffers. see struct screen_info
|
||||
* in include/linux/tty.h
|
||||
*/
|
||||
#define ATAG_VIDEOLFB 0x54410008
|
||||
|
||||
struct tag_videolfb {
|
||||
__u16 lfb_width;
|
||||
__u16 lfb_height;
|
||||
__u16 lfb_depth;
|
||||
__u16 lfb_linelength;
|
||||
__u32 lfb_base;
|
||||
__u32 lfb_size;
|
||||
__u8 red_size;
|
||||
__u8 red_pos;
|
||||
__u8 green_size;
|
||||
__u8 green_pos;
|
||||
__u8 blue_size;
|
||||
__u8 blue_pos;
|
||||
__u8 rsvd_size;
|
||||
__u8 rsvd_pos;
|
||||
};
|
||||
|
||||
/* command line: \0 terminated string */
|
||||
#define ATAG_CMDLINE 0x54410009
|
||||
|
||||
struct tag_cmdline {
|
||||
char cmdline[1]; /* this is the minimum size */
|
||||
};
|
||||
|
||||
/* acorn RiscPC specific information */
|
||||
#define ATAG_ACORN 0x41000101
|
||||
|
||||
struct tag_acorn {
|
||||
__u32 memc_control_reg;
|
||||
__u32 vram_pages;
|
||||
__u8 sounddefault;
|
||||
__u8 adfsdrives;
|
||||
};
|
||||
|
||||
/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
|
||||
#define ATAG_MEMCLK 0x41000402
|
||||
|
||||
struct tag_memclk {
|
||||
__u32 fmemclk;
|
||||
};
|
||||
|
||||
struct tag {
|
||||
struct tag_header hdr;
|
||||
union {
|
||||
struct tag_core core;
|
||||
struct tag_mem32 mem;
|
||||
struct tag_videotext videotext;
|
||||
struct tag_ramdisk ramdisk;
|
||||
struct tag_initrd initrd;
|
||||
struct tag_serialnr serialnr;
|
||||
struct tag_revision revision;
|
||||
struct tag_videolfb videolfb;
|
||||
struct tag_cmdline cmdline;
|
||||
|
||||
/*
|
||||
* Acorn specific
|
||||
*/
|
||||
struct tag_acorn acorn;
|
||||
|
||||
/*
|
||||
* DC21285 specific
|
||||
*/
|
||||
struct tag_memclk memclk;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct tagtable {
|
||||
__u32 tag;
|
||||
int (*parse)(const struct tag *);
|
||||
};
|
||||
|
||||
#define tag_member_present(tag,member) \
|
||||
((unsigned long)(&((struct tag *)0L)->member + 1) \
|
||||
<= (tag)->hdr.size * 4)
|
||||
|
||||
#define tag_next(t) ((struct tag *)((__u32 *)(t) + (t)->hdr.size))
|
||||
#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
|
||||
|
||||
#define for_each_tag(t,base) \
|
||||
for (t = base; t->hdr.size; t = tag_next(t))
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define __tag __used __attribute__((__section__(".taglist.init")))
|
||||
#define __tagtable(tag, fn) \
|
||||
@ -221,6 +53,4 @@ extern int arm_add_memory(phys_addr_t start, phys_addr_t size);
|
||||
extern void early_print(const char *str, ...);
|
||||
extern void dump_machine_table(void);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif
|
||||
|
||||
@ -1,12 +1,8 @@
|
||||
#ifndef _ASMARM_SIGNAL_H
|
||||
#define _ASMARM_SIGNAL_H
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <uapi/asm/signal.h>
|
||||
|
||||
/* Avoid too many header ordering problems. */
|
||||
struct siginfo;
|
||||
|
||||
#ifdef __KERNEL__
|
||||
/* Most things should be clean enough to redefine this at will, if care
|
||||
is taken to make libc match. */
|
||||
|
||||
@ -20,100 +16,6 @@ typedef struct {
|
||||
unsigned long sig[_NSIG_WORDS];
|
||||
} sigset_t;
|
||||
|
||||
#else
|
||||
/* Here we must cater to libcs that poke about in kernel headers. */
|
||||
|
||||
#define NSIG 32
|
||||
typedef unsigned long sigset_t;
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#define SIGHUP 1
|
||||
#define SIGINT 2
|
||||
#define SIGQUIT 3
|
||||
#define SIGILL 4
|
||||
#define SIGTRAP 5
|
||||
#define SIGABRT 6
|
||||
#define SIGIOT 6
|
||||
#define SIGBUS 7
|
||||
#define SIGFPE 8
|
||||
#define SIGKILL 9
|
||||
#define SIGUSR1 10
|
||||
#define SIGSEGV 11
|
||||
#define SIGUSR2 12
|
||||
#define SIGPIPE 13
|
||||
#define SIGALRM 14
|
||||
#define SIGTERM 15
|
||||
#define SIGSTKFLT 16
|
||||
#define SIGCHLD 17
|
||||
#define SIGCONT 18
|
||||
#define SIGSTOP 19
|
||||
#define SIGTSTP 20
|
||||
#define SIGTTIN 21
|
||||
#define SIGTTOU 22
|
||||
#define SIGURG 23
|
||||
#define SIGXCPU 24
|
||||
#define SIGXFSZ 25
|
||||
#define SIGVTALRM 26
|
||||
#define SIGPROF 27
|
||||
#define SIGWINCH 28
|
||||
#define SIGIO 29
|
||||
#define SIGPOLL SIGIO
|
||||
/*
|
||||
#define SIGLOST 29
|
||||
*/
|
||||
#define SIGPWR 30
|
||||
#define SIGSYS 31
|
||||
#define SIGUNUSED 31
|
||||
|
||||
/* These should not be considered constants from userland. */
|
||||
#define SIGRTMIN 32
|
||||
#define SIGRTMAX _NSIG
|
||||
|
||||
#define SIGSWI 32
|
||||
|
||||
/*
|
||||
* SA_FLAGS values:
|
||||
*
|
||||
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
|
||||
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
|
||||
* SA_SIGINFO deliver the signal with SIGINFO structs
|
||||
* SA_THIRTYTWO delivers the signal in 32-bit mode, even if the task
|
||||
* is running in 26-bit.
|
||||
* SA_ONSTACK allows alternate signal stacks (see sigaltstack(2)).
|
||||
* SA_RESTART flag to get restarting signals (which were the default long ago)
|
||||
* SA_NODEFER prevents the current signal from being masked in the handler.
|
||||
* SA_RESETHAND clears the handler when the signal is delivered.
|
||||
*
|
||||
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
|
||||
* Unix names RESETHAND and NODEFER respectively.
|
||||
*/
|
||||
#define SA_NOCLDSTOP 0x00000001
|
||||
#define SA_NOCLDWAIT 0x00000002
|
||||
#define SA_SIGINFO 0x00000004
|
||||
#define SA_THIRTYTWO 0x02000000
|
||||
#define SA_RESTORER 0x04000000
|
||||
#define SA_ONSTACK 0x08000000
|
||||
#define SA_RESTART 0x10000000
|
||||
#define SA_NODEFER 0x40000000
|
||||
#define SA_RESETHAND 0x80000000
|
||||
|
||||
#define SA_NOMASK SA_NODEFER
|
||||
#define SA_ONESHOT SA_RESETHAND
|
||||
|
||||
|
||||
/*
|
||||
* sigaltstack controls
|
||||
*/
|
||||
#define SS_ONSTACK 1
|
||||
#define SS_DISABLE 2
|
||||
|
||||
#define MINSIGSTKSZ 2048
|
||||
#define SIGSTKSZ 8192
|
||||
|
||||
#include <asm-generic/signal-defs.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
struct old_sigaction {
|
||||
__sighandler_t sa_handler;
|
||||
old_sigset_t sa_mask;
|
||||
@ -132,33 +34,6 @@ struct k_sigaction {
|
||||
struct sigaction sa;
|
||||
};
|
||||
|
||||
#else
|
||||
/* Here we must cater to libcs that poke about in kernel headers. */
|
||||
|
||||
struct sigaction {
|
||||
union {
|
||||
__sighandler_t _sa_handler;
|
||||
void (*_sa_sigaction)(int, struct siginfo *, void *);
|
||||
} _u;
|
||||
sigset_t sa_mask;
|
||||
unsigned long sa_flags;
|
||||
void (*sa_restorer)(void);
|
||||
};
|
||||
|
||||
#define sa_handler _u._sa_handler
|
||||
#define sa_sigaction _u._sa_sigaction
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
typedef struct sigaltstack {
|
||||
void __user *ss_sp;
|
||||
int ss_flags;
|
||||
size_t ss_size;
|
||||
} stack_t;
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#include <asm/sigcontext.h>
|
||||
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@ -15,14 +15,8 @@
|
||||
#ifndef __ASM_ARM_SWAB_H
|
||||
#define __ASM_ARM_SWAB_H
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/types.h>
|
||||
#include <uapi/asm/swab.h>
|
||||
|
||||
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
|
||||
# define __SWAB_64_THRU_32__
|
||||
#endif
|
||||
|
||||
#if defined(__KERNEL__)
|
||||
#if __LINUX_ARM_ARCH__ >= 6
|
||||
|
||||
static inline __attribute_const__ __u32 __arch_swahb32(__u32 x)
|
||||
@ -42,32 +36,3 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
|
||||
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if !defined(__KERNEL__) || __LINUX_ARM_ARCH__ < 6
|
||||
static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
|
||||
{
|
||||
__u32 t;
|
||||
|
||||
#ifndef __thumb__
|
||||
if (!__builtin_constant_p(x)) {
|
||||
/*
|
||||
* The compiler needs a bit of a hint here to always do the
|
||||
* right thing and not screw it up to different degrees
|
||||
* depending on the gcc version.
|
||||
*/
|
||||
asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
|
||||
} else
|
||||
#endif
|
||||
t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
|
||||
|
||||
x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
|
||||
t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
|
||||
x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
|
||||
|
||||
return x;
|
||||
}
|
||||
#define __arch_swab32 __arch_swab32
|
||||
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
@ -13,447 +13,10 @@
|
||||
#ifndef __ASM_ARM_UNISTD_H
|
||||
#define __ASM_ARM_UNISTD_H
|
||||
|
||||
#define __NR_OABI_SYSCALL_BASE 0x900000
|
||||
#include <uapi/asm/unistd.h>
|
||||
|
||||
#if defined(__thumb__) || defined(__ARM_EABI__)
|
||||
#define __NR_SYSCALL_BASE 0
|
||||
#else
|
||||
#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This file contains the system call numbers.
|
||||
*/
|
||||
|
||||
#define __NR_restart_syscall (__NR_SYSCALL_BASE+ 0)
|
||||
#define __NR_exit (__NR_SYSCALL_BASE+ 1)
|
||||
#define __NR_fork (__NR_SYSCALL_BASE+ 2)
|
||||
#define __NR_read (__NR_SYSCALL_BASE+ 3)
|
||||
#define __NR_write (__NR_SYSCALL_BASE+ 4)
|
||||
#define __NR_open (__NR_SYSCALL_BASE+ 5)
|
||||
#define __NR_close (__NR_SYSCALL_BASE+ 6)
|
||||
/* 7 was sys_waitpid */
|
||||
#define __NR_creat (__NR_SYSCALL_BASE+ 8)
|
||||
#define __NR_link (__NR_SYSCALL_BASE+ 9)
|
||||
#define __NR_unlink (__NR_SYSCALL_BASE+ 10)
|
||||
#define __NR_execve (__NR_SYSCALL_BASE+ 11)
|
||||
#define __NR_chdir (__NR_SYSCALL_BASE+ 12)
|
||||
#define __NR_time (__NR_SYSCALL_BASE+ 13)
|
||||
#define __NR_mknod (__NR_SYSCALL_BASE+ 14)
|
||||
#define __NR_chmod (__NR_SYSCALL_BASE+ 15)
|
||||
#define __NR_lchown (__NR_SYSCALL_BASE+ 16)
|
||||
/* 17 was sys_break */
|
||||
/* 18 was sys_stat */
|
||||
#define __NR_lseek (__NR_SYSCALL_BASE+ 19)
|
||||
#define __NR_getpid (__NR_SYSCALL_BASE+ 20)
|
||||
#define __NR_mount (__NR_SYSCALL_BASE+ 21)
|
||||
#define __NR_umount (__NR_SYSCALL_BASE+ 22)
|
||||
#define __NR_setuid (__NR_SYSCALL_BASE+ 23)
|
||||
#define __NR_getuid (__NR_SYSCALL_BASE+ 24)
|
||||
#define __NR_stime (__NR_SYSCALL_BASE+ 25)
|
||||
#define __NR_ptrace (__NR_SYSCALL_BASE+ 26)
|
||||
#define __NR_alarm (__NR_SYSCALL_BASE+ 27)
|
||||
/* 28 was sys_fstat */
|
||||
#define __NR_pause (__NR_SYSCALL_BASE+ 29)
|
||||
#define __NR_utime (__NR_SYSCALL_BASE+ 30)
|
||||
/* 31 was sys_stty */
|
||||
/* 32 was sys_gtty */
|
||||
#define __NR_access (__NR_SYSCALL_BASE+ 33)
|
||||
#define __NR_nice (__NR_SYSCALL_BASE+ 34)
|
||||
/* 35 was sys_ftime */
|
||||
#define __NR_sync (__NR_SYSCALL_BASE+ 36)
|
||||
#define __NR_kill (__NR_SYSCALL_BASE+ 37)
|
||||
#define __NR_rename (__NR_SYSCALL_BASE+ 38)
|
||||
#define __NR_mkdir (__NR_SYSCALL_BASE+ 39)
|
||||
#define __NR_rmdir (__NR_SYSCALL_BASE+ 40)
|
||||
#define __NR_dup (__NR_SYSCALL_BASE+ 41)
|
||||
#define __NR_pipe (__NR_SYSCALL_BASE+ 42)
|
||||
#define __NR_times (__NR_SYSCALL_BASE+ 43)
|
||||
/* 44 was sys_prof */
|
||||
#define __NR_brk (__NR_SYSCALL_BASE+ 45)
|
||||
#define __NR_setgid (__NR_SYSCALL_BASE+ 46)
|
||||
#define __NR_getgid (__NR_SYSCALL_BASE+ 47)
|
||||
/* 48 was sys_signal */
|
||||
#define __NR_geteuid (__NR_SYSCALL_BASE+ 49)
|
||||
#define __NR_getegid (__NR_SYSCALL_BASE+ 50)
|
||||
#define __NR_acct (__NR_SYSCALL_BASE+ 51)
|
||||
#define __NR_umount2 (__NR_SYSCALL_BASE+ 52)
|
||||
/* 53 was sys_lock */
|
||||
#define __NR_ioctl (__NR_SYSCALL_BASE+ 54)
|
||||
#define __NR_fcntl (__NR_SYSCALL_BASE+ 55)
|
||||
/* 56 was sys_mpx */
|
||||
#define __NR_setpgid (__NR_SYSCALL_BASE+ 57)
|
||||
/* 58 was sys_ulimit */
|
||||
/* 59 was sys_olduname */
|
||||
#define __NR_umask (__NR_SYSCALL_BASE+ 60)
|
||||
#define __NR_chroot (__NR_SYSCALL_BASE+ 61)
|
||||
#define __NR_ustat (__NR_SYSCALL_BASE+ 62)
|
||||
#define __NR_dup2 (__NR_SYSCALL_BASE+ 63)
|
||||
#define __NR_getppid (__NR_SYSCALL_BASE+ 64)
|
||||
#define __NR_getpgrp (__NR_SYSCALL_BASE+ 65)
|
||||
#define __NR_setsid (__NR_SYSCALL_BASE+ 66)
|
||||
#define __NR_sigaction (__NR_SYSCALL_BASE+ 67)
|
||||
/* 68 was sys_sgetmask */
|
||||
/* 69 was sys_ssetmask */
|
||||
#define __NR_setreuid (__NR_SYSCALL_BASE+ 70)
|
||||
#define __NR_setregid (__NR_SYSCALL_BASE+ 71)
|
||||
#define __NR_sigsuspend (__NR_SYSCALL_BASE+ 72)
|
||||
#define __NR_sigpending (__NR_SYSCALL_BASE+ 73)
|
||||
#define __NR_sethostname (__NR_SYSCALL_BASE+ 74)
|
||||
#define __NR_setrlimit (__NR_SYSCALL_BASE+ 75)
|
||||
#define __NR_getrlimit (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */
|
||||
#define __NR_getrusage (__NR_SYSCALL_BASE+ 77)
|
||||
#define __NR_gettimeofday (__NR_SYSCALL_BASE+ 78)
|
||||
#define __NR_settimeofday (__NR_SYSCALL_BASE+ 79)
|
||||
#define __NR_getgroups (__NR_SYSCALL_BASE+ 80)
|
||||
#define __NR_setgroups (__NR_SYSCALL_BASE+ 81)
|
||||
#define __NR_select (__NR_SYSCALL_BASE+ 82)
|
||||
#define __NR_symlink (__NR_SYSCALL_BASE+ 83)
|
||||
/* 84 was sys_lstat */
|
||||
#define __NR_readlink (__NR_SYSCALL_BASE+ 85)
|
||||
#define __NR_uselib (__NR_SYSCALL_BASE+ 86)
|
||||
#define __NR_swapon (__NR_SYSCALL_BASE+ 87)
|
||||
#define __NR_reboot (__NR_SYSCALL_BASE+ 88)
|
||||
#define __NR_readdir (__NR_SYSCALL_BASE+ 89)
|
||||
#define __NR_mmap (__NR_SYSCALL_BASE+ 90)
|
||||
#define __NR_munmap (__NR_SYSCALL_BASE+ 91)
|
||||
#define __NR_truncate (__NR_SYSCALL_BASE+ 92)
|
||||
#define __NR_ftruncate (__NR_SYSCALL_BASE+ 93)
|
||||
#define __NR_fchmod (__NR_SYSCALL_BASE+ 94)
|
||||
#define __NR_fchown (__NR_SYSCALL_BASE+ 95)
|
||||
#define __NR_getpriority (__NR_SYSCALL_BASE+ 96)
|
||||
#define __NR_setpriority (__NR_SYSCALL_BASE+ 97)
|
||||
/* 98 was sys_profil */
|
||||
#define __NR_statfs (__NR_SYSCALL_BASE+ 99)
|
||||
#define __NR_fstatfs (__NR_SYSCALL_BASE+100)
|
||||
/* 101 was sys_ioperm */
|
||||
#define __NR_socketcall (__NR_SYSCALL_BASE+102)
|
||||
#define __NR_syslog (__NR_SYSCALL_BASE+103)
|
||||
#define __NR_setitimer (__NR_SYSCALL_BASE+104)
|
||||
#define __NR_getitimer (__NR_SYSCALL_BASE+105)
|
||||
#define __NR_stat (__NR_SYSCALL_BASE+106)
|
||||
#define __NR_lstat (__NR_SYSCALL_BASE+107)
|
||||
#define __NR_fstat (__NR_SYSCALL_BASE+108)
|
||||
/* 109 was sys_uname */
|
||||
/* 110 was sys_iopl */
|
||||
#define __NR_vhangup (__NR_SYSCALL_BASE+111)
|
||||
/* 112 was sys_idle */
|
||||
#define __NR_syscall (__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */
|
||||
#define __NR_wait4 (__NR_SYSCALL_BASE+114)
|
||||
#define __NR_swapoff (__NR_SYSCALL_BASE+115)
|
||||
#define __NR_sysinfo (__NR_SYSCALL_BASE+116)
|
||||
#define __NR_ipc (__NR_SYSCALL_BASE+117)
|
||||
#define __NR_fsync (__NR_SYSCALL_BASE+118)
|
||||
#define __NR_sigreturn (__NR_SYSCALL_BASE+119)
|
||||
#define __NR_clone (__NR_SYSCALL_BASE+120)
|
||||
#define __NR_setdomainname (__NR_SYSCALL_BASE+121)
|
||||
#define __NR_uname (__NR_SYSCALL_BASE+122)
|
||||
/* 123 was sys_modify_ldt */
|
||||
#define __NR_adjtimex (__NR_SYSCALL_BASE+124)
|
||||
#define __NR_mprotect (__NR_SYSCALL_BASE+125)
|
||||
#define __NR_sigprocmask (__NR_SYSCALL_BASE+126)
|
||||
/* 127 was sys_create_module */
|
||||
#define __NR_init_module (__NR_SYSCALL_BASE+128)
|
||||
#define __NR_delete_module (__NR_SYSCALL_BASE+129)
|
||||
/* 130 was sys_get_kernel_syms */
|
||||
#define __NR_quotactl (__NR_SYSCALL_BASE+131)
|
||||
#define __NR_getpgid (__NR_SYSCALL_BASE+132)
|
||||
#define __NR_fchdir (__NR_SYSCALL_BASE+133)
|
||||
#define __NR_bdflush (__NR_SYSCALL_BASE+134)
|
||||
#define __NR_sysfs (__NR_SYSCALL_BASE+135)
|
||||
#define __NR_personality (__NR_SYSCALL_BASE+136)
|
||||
/* 137 was sys_afs_syscall */
|
||||
#define __NR_setfsuid (__NR_SYSCALL_BASE+138)
|
||||
#define __NR_setfsgid (__NR_SYSCALL_BASE+139)
|
||||
#define __NR__llseek (__NR_SYSCALL_BASE+140)
|
||||
#define __NR_getdents (__NR_SYSCALL_BASE+141)
|
||||
#define __NR__newselect (__NR_SYSCALL_BASE+142)
|
||||
#define __NR_flock (__NR_SYSCALL_BASE+143)
|
||||
#define __NR_msync (__NR_SYSCALL_BASE+144)
|
||||
#define __NR_readv (__NR_SYSCALL_BASE+145)
|
||||
#define __NR_writev (__NR_SYSCALL_BASE+146)
|
||||
#define __NR_getsid (__NR_SYSCALL_BASE+147)
|
||||
#define __NR_fdatasync (__NR_SYSCALL_BASE+148)
|
||||
#define __NR__sysctl (__NR_SYSCALL_BASE+149)
|
||||
#define __NR_mlock (__NR_SYSCALL_BASE+150)
|
||||
#define __NR_munlock (__NR_SYSCALL_BASE+151)
|
||||
#define __NR_mlockall (__NR_SYSCALL_BASE+152)
|
||||
#define __NR_munlockall (__NR_SYSCALL_BASE+153)
|
||||
#define __NR_sched_setparam (__NR_SYSCALL_BASE+154)
|
||||
#define __NR_sched_getparam (__NR_SYSCALL_BASE+155)
|
||||
#define __NR_sched_setscheduler (__NR_SYSCALL_BASE+156)
|
||||
#define __NR_sched_getscheduler (__NR_SYSCALL_BASE+157)
|
||||
#define __NR_sched_yield (__NR_SYSCALL_BASE+158)
|
||||
#define __NR_sched_get_priority_max (__NR_SYSCALL_BASE+159)
|
||||
#define __NR_sched_get_priority_min (__NR_SYSCALL_BASE+160)
|
||||
#define __NR_sched_rr_get_interval (__NR_SYSCALL_BASE+161)
|
||||
#define __NR_nanosleep (__NR_SYSCALL_BASE+162)
|
||||
#define __NR_mremap (__NR_SYSCALL_BASE+163)
|
||||
#define __NR_setresuid (__NR_SYSCALL_BASE+164)
|
||||
#define __NR_getresuid (__NR_SYSCALL_BASE+165)
|
||||
/* 166 was sys_vm86 */
|
||||
/* 167 was sys_query_module */
|
||||
#define __NR_poll (__NR_SYSCALL_BASE+168)
|
||||
#define __NR_nfsservctl (__NR_SYSCALL_BASE+169)
|
||||
#define __NR_setresgid (__NR_SYSCALL_BASE+170)
|
||||
#define __NR_getresgid (__NR_SYSCALL_BASE+171)
|
||||
#define __NR_prctl (__NR_SYSCALL_BASE+172)
|
||||
#define __NR_rt_sigreturn (__NR_SYSCALL_BASE+173)
|
||||
#define __NR_rt_sigaction (__NR_SYSCALL_BASE+174)
|
||||
#define __NR_rt_sigprocmask (__NR_SYSCALL_BASE+175)
|
||||
#define __NR_rt_sigpending (__NR_SYSCALL_BASE+176)
|
||||
#define __NR_rt_sigtimedwait (__NR_SYSCALL_BASE+177)
|
||||
#define __NR_rt_sigqueueinfo (__NR_SYSCALL_BASE+178)
|
||||
#define __NR_rt_sigsuspend (__NR_SYSCALL_BASE+179)
|
||||
#define __NR_pread64 (__NR_SYSCALL_BASE+180)
|
||||
#define __NR_pwrite64 (__NR_SYSCALL_BASE+181)
|
||||
#define __NR_chown (__NR_SYSCALL_BASE+182)
|
||||
#define __NR_getcwd (__NR_SYSCALL_BASE+183)
|
||||
#define __NR_capget (__NR_SYSCALL_BASE+184)
|
||||
#define __NR_capset (__NR_SYSCALL_BASE+185)
|
||||
#define __NR_sigaltstack (__NR_SYSCALL_BASE+186)
|
||||
#define __NR_sendfile (__NR_SYSCALL_BASE+187)
|
||||
/* 188 reserved */
|
||||
/* 189 reserved */
|
||||
#define __NR_vfork (__NR_SYSCALL_BASE+190)
|
||||
#define __NR_ugetrlimit (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */
|
||||
#define __NR_mmap2 (__NR_SYSCALL_BASE+192)
|
||||
#define __NR_truncate64 (__NR_SYSCALL_BASE+193)
|
||||
#define __NR_ftruncate64 (__NR_SYSCALL_BASE+194)
|
||||
#define __NR_stat64 (__NR_SYSCALL_BASE+195)
|
||||
#define __NR_lstat64 (__NR_SYSCALL_BASE+196)
|
||||
#define __NR_fstat64 (__NR_SYSCALL_BASE+197)
|
||||
#define __NR_lchown32 (__NR_SYSCALL_BASE+198)
|
||||
#define __NR_getuid32 (__NR_SYSCALL_BASE+199)
|
||||
#define __NR_getgid32 (__NR_SYSCALL_BASE+200)
|
||||
#define __NR_geteuid32 (__NR_SYSCALL_BASE+201)
|
||||
#define __NR_getegid32 (__NR_SYSCALL_BASE+202)
|
||||
#define __NR_setreuid32 (__NR_SYSCALL_BASE+203)
|
||||
#define __NR_setregid32 (__NR_SYSCALL_BASE+204)
|
||||
#define __NR_getgroups32 (__NR_SYSCALL_BASE+205)
|
||||
#define __NR_setgroups32 (__NR_SYSCALL_BASE+206)
|
||||
#define __NR_fchown32 (__NR_SYSCALL_BASE+207)
|
||||
#define __NR_setresuid32 (__NR_SYSCALL_BASE+208)
|
||||
#define __NR_getresuid32 (__NR_SYSCALL_BASE+209)
|
||||
#define __NR_setresgid32 (__NR_SYSCALL_BASE+210)
|
||||
#define __NR_getresgid32 (__NR_SYSCALL_BASE+211)
|
||||
#define __NR_chown32 (__NR_SYSCALL_BASE+212)
|
||||
#define __NR_setuid32 (__NR_SYSCALL_BASE+213)
|
||||
#define __NR_setgid32 (__NR_SYSCALL_BASE+214)
|
||||
#define __NR_setfsuid32 (__NR_SYSCALL_BASE+215)
|
||||
#define __NR_setfsgid32 (__NR_SYSCALL_BASE+216)
|
||||
#define __NR_getdents64 (__NR_SYSCALL_BASE+217)
|
||||
#define __NR_pivot_root (__NR_SYSCALL_BASE+218)
|
||||
#define __NR_mincore (__NR_SYSCALL_BASE+219)
|
||||
#define __NR_madvise (__NR_SYSCALL_BASE+220)
|
||||
#define __NR_fcntl64 (__NR_SYSCALL_BASE+221)
|
||||
/* 222 for tux */
|
||||
/* 223 is unused */
|
||||
#define __NR_gettid (__NR_SYSCALL_BASE+224)
|
||||
#define __NR_readahead (__NR_SYSCALL_BASE+225)
|
||||
#define __NR_setxattr (__NR_SYSCALL_BASE+226)
|
||||
#define __NR_lsetxattr (__NR_SYSCALL_BASE+227)
|
||||
#define __NR_fsetxattr (__NR_SYSCALL_BASE+228)
|
||||
#define __NR_getxattr (__NR_SYSCALL_BASE+229)
|
||||
#define __NR_lgetxattr (__NR_SYSCALL_BASE+230)
|
||||
#define __NR_fgetxattr (__NR_SYSCALL_BASE+231)
|
||||
#define __NR_listxattr (__NR_SYSCALL_BASE+232)
|
||||
#define __NR_llistxattr (__NR_SYSCALL_BASE+233)
|
||||
#define __NR_flistxattr (__NR_SYSCALL_BASE+234)
|
||||
#define __NR_removexattr (__NR_SYSCALL_BASE+235)
|
||||
#define __NR_lremovexattr (__NR_SYSCALL_BASE+236)
|
||||
#define __NR_fremovexattr (__NR_SYSCALL_BASE+237)
|
||||
#define __NR_tkill (__NR_SYSCALL_BASE+238)
|
||||
#define __NR_sendfile64 (__NR_SYSCALL_BASE+239)
|
||||
#define __NR_futex (__NR_SYSCALL_BASE+240)
|
||||
#define __NR_sched_setaffinity (__NR_SYSCALL_BASE+241)
|
||||
#define __NR_sched_getaffinity (__NR_SYSCALL_BASE+242)
|
||||
#define __NR_io_setup (__NR_SYSCALL_BASE+243)
|
||||
#define __NR_io_destroy (__NR_SYSCALL_BASE+244)
|
||||
#define __NR_io_getevents (__NR_SYSCALL_BASE+245)
|
||||
#define __NR_io_submit (__NR_SYSCALL_BASE+246)
|
||||
#define __NR_io_cancel (__NR_SYSCALL_BASE+247)
|
||||
#define __NR_exit_group (__NR_SYSCALL_BASE+248)
|
||||
#define __NR_lookup_dcookie (__NR_SYSCALL_BASE+249)
|
||||
#define __NR_epoll_create (__NR_SYSCALL_BASE+250)
|
||||
#define __NR_epoll_ctl (__NR_SYSCALL_BASE+251)
|
||||
#define __NR_epoll_wait (__NR_SYSCALL_BASE+252)
|
||||
#define __NR_remap_file_pages (__NR_SYSCALL_BASE+253)
|
||||
/* 254 for set_thread_area */
|
||||
/* 255 for get_thread_area */
|
||||
#define __NR_set_tid_address (__NR_SYSCALL_BASE+256)
|
||||
#define __NR_timer_create (__NR_SYSCALL_BASE+257)
|
||||
#define __NR_timer_settime (__NR_SYSCALL_BASE+258)
|
||||
#define __NR_timer_gettime (__NR_SYSCALL_BASE+259)
|
||||
#define __NR_timer_getoverrun (__NR_SYSCALL_BASE+260)
|
||||
#define __NR_timer_delete (__NR_SYSCALL_BASE+261)
|
||||
#define __NR_clock_settime (__NR_SYSCALL_BASE+262)
|
||||
#define __NR_clock_gettime (__NR_SYSCALL_BASE+263)
|
||||
#define __NR_clock_getres (__NR_SYSCALL_BASE+264)
|
||||
#define __NR_clock_nanosleep (__NR_SYSCALL_BASE+265)
|
||||
#define __NR_statfs64 (__NR_SYSCALL_BASE+266)
|
||||
#define __NR_fstatfs64 (__NR_SYSCALL_BASE+267)
|
||||
#define __NR_tgkill (__NR_SYSCALL_BASE+268)
|
||||
#define __NR_utimes (__NR_SYSCALL_BASE+269)
|
||||
#define __NR_arm_fadvise64_64 (__NR_SYSCALL_BASE+270)
|
||||
#define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271)
|
||||
#define __NR_pciconfig_read (__NR_SYSCALL_BASE+272)
|
||||
#define __NR_pciconfig_write (__NR_SYSCALL_BASE+273)
|
||||
#define __NR_mq_open (__NR_SYSCALL_BASE+274)
|
||||
#define __NR_mq_unlink (__NR_SYSCALL_BASE+275)
|
||||
#define __NR_mq_timedsend (__NR_SYSCALL_BASE+276)
|
||||
#define __NR_mq_timedreceive (__NR_SYSCALL_BASE+277)
|
||||
#define __NR_mq_notify (__NR_SYSCALL_BASE+278)
|
||||
#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279)
|
||||
#define __NR_waitid (__NR_SYSCALL_BASE+280)
|
||||
#define __NR_socket (__NR_SYSCALL_BASE+281)
|
||||
#define __NR_bind (__NR_SYSCALL_BASE+282)
|
||||
#define __NR_connect (__NR_SYSCALL_BASE+283)
|
||||
#define __NR_listen (__NR_SYSCALL_BASE+284)
|
||||
#define __NR_accept (__NR_SYSCALL_BASE+285)
|
||||
#define __NR_getsockname (__NR_SYSCALL_BASE+286)
|
||||
#define __NR_getpeername (__NR_SYSCALL_BASE+287)
|
||||
#define __NR_socketpair (__NR_SYSCALL_BASE+288)
|
||||
#define __NR_send (__NR_SYSCALL_BASE+289)
|
||||
#define __NR_sendto (__NR_SYSCALL_BASE+290)
|
||||
#define __NR_recv (__NR_SYSCALL_BASE+291)
|
||||
#define __NR_recvfrom (__NR_SYSCALL_BASE+292)
|
||||
#define __NR_shutdown (__NR_SYSCALL_BASE+293)
|
||||
#define __NR_setsockopt (__NR_SYSCALL_BASE+294)
|
||||
#define __NR_getsockopt (__NR_SYSCALL_BASE+295)
|
||||
#define __NR_sendmsg (__NR_SYSCALL_BASE+296)
|
||||
#define __NR_recvmsg (__NR_SYSCALL_BASE+297)
|
||||
#define __NR_semop (__NR_SYSCALL_BASE+298)
|
||||
#define __NR_semget (__NR_SYSCALL_BASE+299)
|
||||
#define __NR_semctl (__NR_SYSCALL_BASE+300)
|
||||
#define __NR_msgsnd (__NR_SYSCALL_BASE+301)
|
||||
#define __NR_msgrcv (__NR_SYSCALL_BASE+302)
|
||||
#define __NR_msgget (__NR_SYSCALL_BASE+303)
|
||||
#define __NR_msgctl (__NR_SYSCALL_BASE+304)
|
||||
#define __NR_shmat (__NR_SYSCALL_BASE+305)
|
||||
#define __NR_shmdt (__NR_SYSCALL_BASE+306)
|
||||
#define __NR_shmget (__NR_SYSCALL_BASE+307)
|
||||
#define __NR_shmctl (__NR_SYSCALL_BASE+308)
|
||||
#define __NR_add_key (__NR_SYSCALL_BASE+309)
|
||||
#define __NR_request_key (__NR_SYSCALL_BASE+310)
|
||||
#define __NR_keyctl (__NR_SYSCALL_BASE+311)
|
||||
#define __NR_semtimedop (__NR_SYSCALL_BASE+312)
|
||||
#define __NR_vserver (__NR_SYSCALL_BASE+313)
|
||||
#define __NR_ioprio_set (__NR_SYSCALL_BASE+314)
|
||||
#define __NR_ioprio_get (__NR_SYSCALL_BASE+315)
|
||||
#define __NR_inotify_init (__NR_SYSCALL_BASE+316)
|
||||
#define __NR_inotify_add_watch (__NR_SYSCALL_BASE+317)
|
||||
#define __NR_inotify_rm_watch (__NR_SYSCALL_BASE+318)
|
||||
#define __NR_mbind (__NR_SYSCALL_BASE+319)
|
||||
#define __NR_get_mempolicy (__NR_SYSCALL_BASE+320)
|
||||
#define __NR_set_mempolicy (__NR_SYSCALL_BASE+321)
|
||||
#define __NR_openat (__NR_SYSCALL_BASE+322)
|
||||
#define __NR_mkdirat (__NR_SYSCALL_BASE+323)
|
||||
#define __NR_mknodat (__NR_SYSCALL_BASE+324)
|
||||
#define __NR_fchownat (__NR_SYSCALL_BASE+325)
|
||||
#define __NR_futimesat (__NR_SYSCALL_BASE+326)
|
||||
#define __NR_fstatat64 (__NR_SYSCALL_BASE+327)
|
||||
#define __NR_unlinkat (__NR_SYSCALL_BASE+328)
|
||||
#define __NR_renameat (__NR_SYSCALL_BASE+329)
|
||||
#define __NR_linkat (__NR_SYSCALL_BASE+330)
|
||||
#define __NR_symlinkat (__NR_SYSCALL_BASE+331)
|
||||
#define __NR_readlinkat (__NR_SYSCALL_BASE+332)
|
||||
#define __NR_fchmodat (__NR_SYSCALL_BASE+333)
|
||||
#define __NR_faccessat (__NR_SYSCALL_BASE+334)
|
||||
#define __NR_pselect6 (__NR_SYSCALL_BASE+335)
|
||||
#define __NR_ppoll (__NR_SYSCALL_BASE+336)
|
||||
#define __NR_unshare (__NR_SYSCALL_BASE+337)
|
||||
#define __NR_set_robust_list (__NR_SYSCALL_BASE+338)
|
||||
#define __NR_get_robust_list (__NR_SYSCALL_BASE+339)
|
||||
#define __NR_splice (__NR_SYSCALL_BASE+340)
|
||||
#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341)
|
||||
#define __NR_sync_file_range2 __NR_arm_sync_file_range
|
||||
#define __NR_tee (__NR_SYSCALL_BASE+342)
|
||||
#define __NR_vmsplice (__NR_SYSCALL_BASE+343)
|
||||
#define __NR_move_pages (__NR_SYSCALL_BASE+344)
|
||||
#define __NR_getcpu (__NR_SYSCALL_BASE+345)
|
||||
#define __NR_epoll_pwait (__NR_SYSCALL_BASE+346)
|
||||
#define __NR_kexec_load (__NR_SYSCALL_BASE+347)
|
||||
#define __NR_utimensat (__NR_SYSCALL_BASE+348)
|
||||
#define __NR_signalfd (__NR_SYSCALL_BASE+349)
|
||||
#define __NR_timerfd_create (__NR_SYSCALL_BASE+350)
|
||||
#define __NR_eventfd (__NR_SYSCALL_BASE+351)
|
||||
#define __NR_fallocate (__NR_SYSCALL_BASE+352)
|
||||
#define __NR_timerfd_settime (__NR_SYSCALL_BASE+353)
|
||||
#define __NR_timerfd_gettime (__NR_SYSCALL_BASE+354)
|
||||
#define __NR_signalfd4 (__NR_SYSCALL_BASE+355)
|
||||
#define __NR_eventfd2 (__NR_SYSCALL_BASE+356)
|
||||
#define __NR_epoll_create1 (__NR_SYSCALL_BASE+357)
|
||||
#define __NR_dup3 (__NR_SYSCALL_BASE+358)
|
||||
#define __NR_pipe2 (__NR_SYSCALL_BASE+359)
|
||||
#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
|
||||
#define __NR_preadv (__NR_SYSCALL_BASE+361)
|
||||
#define __NR_pwritev (__NR_SYSCALL_BASE+362)
|
||||
#define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363)
|
||||
#define __NR_perf_event_open (__NR_SYSCALL_BASE+364)
|
||||
#define __NR_recvmmsg (__NR_SYSCALL_BASE+365)
|
||||
#define __NR_accept4 (__NR_SYSCALL_BASE+366)
|
||||
#define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
|
||||
#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
|
||||
#define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
|
||||
#define __NR_name_to_handle_at (__NR_SYSCALL_BASE+370)
|
||||
#define __NR_open_by_handle_at (__NR_SYSCALL_BASE+371)
|
||||
#define __NR_clock_adjtime (__NR_SYSCALL_BASE+372)
|
||||
#define __NR_syncfs (__NR_SYSCALL_BASE+373)
|
||||
#define __NR_sendmmsg (__NR_SYSCALL_BASE+374)
|
||||
#define __NR_setns (__NR_SYSCALL_BASE+375)
|
||||
#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
|
||||
#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
|
||||
/* 378 for kcmp */
|
||||
|
||||
/*
|
||||
* This may need to be greater than __NR_last_syscall+1 in order to
|
||||
* account for the padding in the syscall table
|
||||
*/
|
||||
#ifdef __KERNEL__
|
||||
#define __NR_syscalls (380)
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
*/
|
||||
#define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
|
||||
#define __ARM_NR_breakpoint (__ARM_NR_BASE+1)
|
||||
#define __ARM_NR_cacheflush (__ARM_NR_BASE+2)
|
||||
#define __ARM_NR_usr26 (__ARM_NR_BASE+3)
|
||||
#define __ARM_NR_usr32 (__ARM_NR_BASE+4)
|
||||
#define __ARM_NR_set_tls (__ARM_NR_BASE+5)
|
||||
|
||||
/*
|
||||
* *NOTE*: This is a ghost syscall private to the kernel. Only the
|
||||
* __kuser_cmpxchg code in entry-armv.S should be aware of its
|
||||
* existence. Don't ever use this from user code.
|
||||
*/
|
||||
#ifdef __KERNEL__
|
||||
#define __ARM_NR_cmpxchg (__ARM_NR_BASE+0x00fff0)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* The following syscalls are obsolete and no longer available for EABI.
|
||||
*/
|
||||
#if !defined(__KERNEL__)
|
||||
#if defined(__ARM_EABI__)
|
||||
#undef __NR_time
|
||||
#undef __NR_umount
|
||||
#undef __NR_stime
|
||||
#undef __NR_alarm
|
||||
#undef __NR_utime
|
||||
#undef __NR_getrlimit
|
||||
#undef __NR_select
|
||||
#undef __NR_readdir
|
||||
#undef __NR_mmap
|
||||
#undef __NR_socketcall
|
||||
#undef __NR_syscall
|
||||
#undef __NR_ipc
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define __ARCH_WANT_STAT64
|
||||
#define __ARCH_WANT_SYS_GETHOSTNAME
|
||||
@ -495,5 +58,4 @@
|
||||
#define __IGNORE_migrate_pages
|
||||
#define __IGNORE_kcmp
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* __ASM_ARM_UNISTD_H */
|
||||
|
||||
@ -1,3 +1,19 @@
|
||||
# UAPI Header export list
|
||||
include include/uapi/asm-generic/Kbuild.asm
|
||||
|
||||
header-y += a.out.h
|
||||
header-y += byteorder.h
|
||||
header-y += fcntl.h
|
||||
header-y += hwcap.h
|
||||
header-y += ioctls.h
|
||||
header-y += kvm_para.h
|
||||
header-y += mman.h
|
||||
header-y += posix_types.h
|
||||
header-y += ptrace.h
|
||||
header-y += setup.h
|
||||
header-y += sigcontext.h
|
||||
header-y += signal.h
|
||||
header-y += stat.h
|
||||
header-y += statfs.h
|
||||
header-y += swab.h
|
||||
header-y += unistd.h
|
||||
|
||||
29
arch/arm/include/uapi/asm/hwcap.h
Normal file
29
arch/arm/include/uapi/asm/hwcap.h
Normal file
@ -0,0 +1,29 @@
|
||||
#ifndef _UAPI__ASMARM_HWCAP_H
|
||||
#define _UAPI__ASMARM_HWCAP_H
|
||||
|
||||
/*
|
||||
* HWCAP flags - for elf_hwcap (in kernel) and AT_HWCAP
|
||||
*/
|
||||
#define HWCAP_SWP (1 << 0)
|
||||
#define HWCAP_HALF (1 << 1)
|
||||
#define HWCAP_THUMB (1 << 2)
|
||||
#define HWCAP_26BIT (1 << 3) /* Play it safe */
|
||||
#define HWCAP_FAST_MULT (1 << 4)
|
||||
#define HWCAP_FPA (1 << 5)
|
||||
#define HWCAP_VFP (1 << 6)
|
||||
#define HWCAP_EDSP (1 << 7)
|
||||
#define HWCAP_JAVA (1 << 8)
|
||||
#define HWCAP_IWMMXT (1 << 9)
|
||||
#define HWCAP_CRUNCH (1 << 10)
|
||||
#define HWCAP_THUMBEE (1 << 11)
|
||||
#define HWCAP_NEON (1 << 12)
|
||||
#define HWCAP_VFPv3 (1 << 13)
|
||||
#define HWCAP_VFPv3D16 (1 << 14)
|
||||
#define HWCAP_TLS (1 << 15)
|
||||
#define HWCAP_VFPv4 (1 << 16)
|
||||
#define HWCAP_IDIVA (1 << 17)
|
||||
#define HWCAP_IDIVT (1 << 18)
|
||||
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
|
||||
|
||||
|
||||
#endif /* _UAPI__ASMARM_HWCAP_H */
|
||||
138
arch/arm/include/uapi/asm/ptrace.h
Normal file
138
arch/arm/include/uapi/asm/ptrace.h
Normal file
@ -0,0 +1,138 @@
|
||||
/*
|
||||
* arch/arm/include/asm/ptrace.h
|
||||
*
|
||||
* Copyright (C) 1996-2003 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
#ifndef _UAPI__ASM_ARM_PTRACE_H
|
||||
#define _UAPI__ASM_ARM_PTRACE_H
|
||||
|
||||
#include <asm/hwcap.h>
|
||||
|
||||
#define PTRACE_GETREGS 12
|
||||
#define PTRACE_SETREGS 13
|
||||
#define PTRACE_GETFPREGS 14
|
||||
#define PTRACE_SETFPREGS 15
|
||||
/* PTRACE_ATTACH is 16 */
|
||||
/* PTRACE_DETACH is 17 */
|
||||
#define PTRACE_GETWMMXREGS 18
|
||||
#define PTRACE_SETWMMXREGS 19
|
||||
/* 20 is unused */
|
||||
#define PTRACE_OLDSETOPTIONS 21
|
||||
#define PTRACE_GET_THREAD_AREA 22
|
||||
#define PTRACE_SET_SYSCALL 23
|
||||
/* PTRACE_SYSCALL is 24 */
|
||||
#define PTRACE_GETCRUNCHREGS 25
|
||||
#define PTRACE_SETCRUNCHREGS 26
|
||||
#define PTRACE_GETVFPREGS 27
|
||||
#define PTRACE_SETVFPREGS 28
|
||||
#define PTRACE_GETHBPREGS 29
|
||||
#define PTRACE_SETHBPREGS 30
|
||||
|
||||
/*
|
||||
* PSR bits
|
||||
*/
|
||||
#define USR26_MODE 0x00000000
|
||||
#define FIQ26_MODE 0x00000001
|
||||
#define IRQ26_MODE 0x00000002
|
||||
#define SVC26_MODE 0x00000003
|
||||
#define USR_MODE 0x00000010
|
||||
#define FIQ_MODE 0x00000011
|
||||
#define IRQ_MODE 0x00000012
|
||||
#define SVC_MODE 0x00000013
|
||||
#define ABT_MODE 0x00000017
|
||||
#define HYP_MODE 0x0000001a
|
||||
#define UND_MODE 0x0000001b
|
||||
#define SYSTEM_MODE 0x0000001f
|
||||
#define MODE32_BIT 0x00000010
|
||||
#define MODE_MASK 0x0000001f
|
||||
#define PSR_T_BIT 0x00000020
|
||||
#define PSR_F_BIT 0x00000040
|
||||
#define PSR_I_BIT 0x00000080
|
||||
#define PSR_A_BIT 0x00000100
|
||||
#define PSR_E_BIT 0x00000200
|
||||
#define PSR_J_BIT 0x01000000
|
||||
#define PSR_Q_BIT 0x08000000
|
||||
#define PSR_V_BIT 0x10000000
|
||||
#define PSR_C_BIT 0x20000000
|
||||
#define PSR_Z_BIT 0x40000000
|
||||
#define PSR_N_BIT 0x80000000
|
||||
|
||||
/*
|
||||
* Groups of PSR bits
|
||||
*/
|
||||
#define PSR_f 0xff000000 /* Flags */
|
||||
#define PSR_s 0x00ff0000 /* Status */
|
||||
#define PSR_x 0x0000ff00 /* Extension */
|
||||
#define PSR_c 0x000000ff /* Control */
|
||||
|
||||
/*
|
||||
* ARMv7 groups of PSR bits
|
||||
*/
|
||||
#define APSR_MASK 0xf80f0000 /* N, Z, C, V, Q and GE flags */
|
||||
#define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
|
||||
#define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
|
||||
#define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
|
||||
|
||||
/*
|
||||
* Default endianness state
|
||||
*/
|
||||
#ifdef CONFIG_CPU_ENDIAN_BE8
|
||||
#define PSR_ENDSTATE PSR_E_BIT
|
||||
#else
|
||||
#define PSR_ENDSTATE 0
|
||||
#endif
|
||||
|
||||
/*
|
||||
* These are 'magic' values for PTRACE_PEEKUSR that return info about where a
|
||||
* process is located in memory.
|
||||
*/
|
||||
#define PT_TEXT_ADDR 0x10000
|
||||
#define PT_DATA_ADDR 0x10004
|
||||
#define PT_TEXT_END_ADDR 0x10008
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/*
|
||||
* This struct defines the way the registers are stored on the
|
||||
* stack during a system call. Note that sizeof(struct pt_regs)
|
||||
* has to be a multiple of 8.
|
||||
*/
|
||||
#ifndef __KERNEL__
|
||||
struct pt_regs {
|
||||
long uregs[18];
|
||||
};
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#define ARM_cpsr uregs[16]
|
||||
#define ARM_pc uregs[15]
|
||||
#define ARM_lr uregs[14]
|
||||
#define ARM_sp uregs[13]
|
||||
#define ARM_ip uregs[12]
|
||||
#define ARM_fp uregs[11]
|
||||
#define ARM_r10 uregs[10]
|
||||
#define ARM_r9 uregs[9]
|
||||
#define ARM_r8 uregs[8]
|
||||
#define ARM_r7 uregs[7]
|
||||
#define ARM_r6 uregs[6]
|
||||
#define ARM_r5 uregs[5]
|
||||
#define ARM_r4 uregs[4]
|
||||
#define ARM_r3 uregs[3]
|
||||
#define ARM_r2 uregs[2]
|
||||
#define ARM_r1 uregs[1]
|
||||
#define ARM_r0 uregs[0]
|
||||
#define ARM_ORIG_r0 uregs[17]
|
||||
|
||||
/*
|
||||
* The size of the user-visible VFP state as seen by PTRACE_GET/SETVFPREGS
|
||||
* and core dumps.
|
||||
*/
|
||||
#define ARM_VFPREGS_SIZE ( 32 * 8 /*fpregs*/ + 4 /*fpscr*/ )
|
||||
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
|
||||
#endif /* _UAPI__ASM_ARM_PTRACE_H */
|
||||
187
arch/arm/include/uapi/asm/setup.h
Normal file
187
arch/arm/include/uapi/asm/setup.h
Normal file
@ -0,0 +1,187 @@
|
||||
/*
|
||||
* linux/include/asm/setup.h
|
||||
*
|
||||
* Copyright (C) 1997-1999 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Structure passed to kernel to tell it about the
|
||||
* hardware it's running on. See Documentation/arm/Setup
|
||||
* for more info.
|
||||
*/
|
||||
#ifndef _UAPI__ASMARM_SETUP_H
|
||||
#define _UAPI__ASMARM_SETUP_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
#define COMMAND_LINE_SIZE 1024
|
||||
|
||||
/* The list ends with an ATAG_NONE node. */
|
||||
#define ATAG_NONE 0x00000000
|
||||
|
||||
struct tag_header {
|
||||
__u32 size;
|
||||
__u32 tag;
|
||||
};
|
||||
|
||||
/* The list must start with an ATAG_CORE node */
|
||||
#define ATAG_CORE 0x54410001
|
||||
|
||||
struct tag_core {
|
||||
__u32 flags; /* bit 0 = read-only */
|
||||
__u32 pagesize;
|
||||
__u32 rootdev;
|
||||
};
|
||||
|
||||
/* it is allowed to have multiple ATAG_MEM nodes */
|
||||
#define ATAG_MEM 0x54410002
|
||||
|
||||
struct tag_mem32 {
|
||||
__u32 size;
|
||||
__u32 start; /* physical start address */
|
||||
};
|
||||
|
||||
/* VGA text type displays */
|
||||
#define ATAG_VIDEOTEXT 0x54410003
|
||||
|
||||
struct tag_videotext {
|
||||
__u8 x;
|
||||
__u8 y;
|
||||
__u16 video_page;
|
||||
__u8 video_mode;
|
||||
__u8 video_cols;
|
||||
__u16 video_ega_bx;
|
||||
__u8 video_lines;
|
||||
__u8 video_isvga;
|
||||
__u16 video_points;
|
||||
};
|
||||
|
||||
/* describes how the ramdisk will be used in kernel */
|
||||
#define ATAG_RAMDISK 0x54410004
|
||||
|
||||
struct tag_ramdisk {
|
||||
__u32 flags; /* bit 0 = load, bit 1 = prompt */
|
||||
__u32 size; /* decompressed ramdisk size in _kilo_ bytes */
|
||||
__u32 start; /* starting block of floppy-based RAM disk image */
|
||||
};
|
||||
|
||||
/* describes where the compressed ramdisk image lives (virtual address) */
|
||||
/*
|
||||
* this one accidentally used virtual addresses - as such,
|
||||
* it's deprecated.
|
||||
*/
|
||||
#define ATAG_INITRD 0x54410005
|
||||
|
||||
/* describes where the compressed ramdisk image lives (physical address) */
|
||||
#define ATAG_INITRD2 0x54420005
|
||||
|
||||
struct tag_initrd {
|
||||
__u32 start; /* physical start address */
|
||||
__u32 size; /* size of compressed ramdisk image in bytes */
|
||||
};
|
||||
|
||||
/* board serial number. "64 bits should be enough for everybody" */
|
||||
#define ATAG_SERIAL 0x54410006
|
||||
|
||||
struct tag_serialnr {
|
||||
__u32 low;
|
||||
__u32 high;
|
||||
};
|
||||
|
||||
/* board revision */
|
||||
#define ATAG_REVISION 0x54410007
|
||||
|
||||
struct tag_revision {
|
||||
__u32 rev;
|
||||
};
|
||||
|
||||
/* initial values for vesafb-type framebuffers. see struct screen_info
|
||||
* in include/linux/tty.h
|
||||
*/
|
||||
#define ATAG_VIDEOLFB 0x54410008
|
||||
|
||||
struct tag_videolfb {
|
||||
__u16 lfb_width;
|
||||
__u16 lfb_height;
|
||||
__u16 lfb_depth;
|
||||
__u16 lfb_linelength;
|
||||
__u32 lfb_base;
|
||||
__u32 lfb_size;
|
||||
__u8 red_size;
|
||||
__u8 red_pos;
|
||||
__u8 green_size;
|
||||
__u8 green_pos;
|
||||
__u8 blue_size;
|
||||
__u8 blue_pos;
|
||||
__u8 rsvd_size;
|
||||
__u8 rsvd_pos;
|
||||
};
|
||||
|
||||
/* command line: \0 terminated string */
|
||||
#define ATAG_CMDLINE 0x54410009
|
||||
|
||||
struct tag_cmdline {
|
||||
char cmdline[1]; /* this is the minimum size */
|
||||
};
|
||||
|
||||
/* acorn RiscPC specific information */
|
||||
#define ATAG_ACORN 0x41000101
|
||||
|
||||
struct tag_acorn {
|
||||
__u32 memc_control_reg;
|
||||
__u32 vram_pages;
|
||||
__u8 sounddefault;
|
||||
__u8 adfsdrives;
|
||||
};
|
||||
|
||||
/* footbridge memory clock, see arch/arm/mach-footbridge/arch.c */
|
||||
#define ATAG_MEMCLK 0x41000402
|
||||
|
||||
struct tag_memclk {
|
||||
__u32 fmemclk;
|
||||
};
|
||||
|
||||
struct tag {
|
||||
struct tag_header hdr;
|
||||
union {
|
||||
struct tag_core core;
|
||||
struct tag_mem32 mem;
|
||||
struct tag_videotext videotext;
|
||||
struct tag_ramdisk ramdisk;
|
||||
struct tag_initrd initrd;
|
||||
struct tag_serialnr serialnr;
|
||||
struct tag_revision revision;
|
||||
struct tag_videolfb videolfb;
|
||||
struct tag_cmdline cmdline;
|
||||
|
||||
/*
|
||||
* Acorn specific
|
||||
*/
|
||||
struct tag_acorn acorn;
|
||||
|
||||
/*
|
||||
* DC21285 specific
|
||||
*/
|
||||
struct tag_memclk memclk;
|
||||
} u;
|
||||
};
|
||||
|
||||
struct tagtable {
|
||||
__u32 tag;
|
||||
int (*parse)(const struct tag *);
|
||||
};
|
||||
|
||||
#define tag_member_present(tag,member) \
|
||||
((unsigned long)(&((struct tag *)0L)->member + 1) \
|
||||
<= (tag)->hdr.size * 4)
|
||||
|
||||
#define tag_next(t) ((struct tag *)((__u32 *)(t) + (t)->hdr.size))
|
||||
#define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2)
|
||||
|
||||
#define for_each_tag(t,base) \
|
||||
for (t = base; t->hdr.size; t = tag_next(t))
|
||||
|
||||
|
||||
#endif /* _UAPI__ASMARM_SETUP_H */
|
||||
127
arch/arm/include/uapi/asm/signal.h
Normal file
127
arch/arm/include/uapi/asm/signal.h
Normal file
@ -0,0 +1,127 @@
|
||||
#ifndef _UAPI_ASMARM_SIGNAL_H
|
||||
#define _UAPI_ASMARM_SIGNAL_H
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
/* Avoid too many header ordering problems. */
|
||||
struct siginfo;
|
||||
|
||||
#ifndef __KERNEL__
|
||||
/* Here we must cater to libcs that poke about in kernel headers. */
|
||||
|
||||
#define NSIG 32
|
||||
typedef unsigned long sigset_t;
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#define SIGHUP 1
|
||||
#define SIGINT 2
|
||||
#define SIGQUIT 3
|
||||
#define SIGILL 4
|
||||
#define SIGTRAP 5
|
||||
#define SIGABRT 6
|
||||
#define SIGIOT 6
|
||||
#define SIGBUS 7
|
||||
#define SIGFPE 8
|
||||
#define SIGKILL 9
|
||||
#define SIGUSR1 10
|
||||
#define SIGSEGV 11
|
||||
#define SIGUSR2 12
|
||||
#define SIGPIPE 13
|
||||
#define SIGALRM 14
|
||||
#define SIGTERM 15
|
||||
#define SIGSTKFLT 16
|
||||
#define SIGCHLD 17
|
||||
#define SIGCONT 18
|
||||
#define SIGSTOP 19
|
||||
#define SIGTSTP 20
|
||||
#define SIGTTIN 21
|
||||
#define SIGTTOU 22
|
||||
#define SIGURG 23
|
||||
#define SIGXCPU 24
|
||||
#define SIGXFSZ 25
|
||||
#define SIGVTALRM 26
|
||||
#define SIGPROF 27
|
||||
#define SIGWINCH 28
|
||||
#define SIGIO 29
|
||||
#define SIGPOLL SIGIO
|
||||
/*
|
||||
#define SIGLOST 29
|
||||
*/
|
||||
#define SIGPWR 30
|
||||
#define SIGSYS 31
|
||||
#define SIGUNUSED 31
|
||||
|
||||
/* These should not be considered constants from userland. */
|
||||
#define SIGRTMIN 32
|
||||
#define SIGRTMAX _NSIG
|
||||
|
||||
#define SIGSWI 32
|
||||
|
||||
/*
|
||||
* SA_FLAGS values:
|
||||
*
|
||||
* SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
|
||||
* SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
|
||||
* SA_SIGINFO deliver the signal with SIGINFO structs
|
||||
* SA_THIRTYTWO delivers the signal in 32-bit mode, even if the task
|
||||
* is running in 26-bit.
|
||||
* SA_ONSTACK allows alternate signal stacks (see sigaltstack(2)).
|
||||
* SA_RESTART flag to get restarting signals (which were the default long ago)
|
||||
* SA_NODEFER prevents the current signal from being masked in the handler.
|
||||
* SA_RESETHAND clears the handler when the signal is delivered.
|
||||
*
|
||||
* SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
|
||||
* Unix names RESETHAND and NODEFER respectively.
|
||||
*/
|
||||
#define SA_NOCLDSTOP 0x00000001
|
||||
#define SA_NOCLDWAIT 0x00000002
|
||||
#define SA_SIGINFO 0x00000004
|
||||
#define SA_THIRTYTWO 0x02000000
|
||||
#define SA_RESTORER 0x04000000
|
||||
#define SA_ONSTACK 0x08000000
|
||||
#define SA_RESTART 0x10000000
|
||||
#define SA_NODEFER 0x40000000
|
||||
#define SA_RESETHAND 0x80000000
|
||||
|
||||
#define SA_NOMASK SA_NODEFER
|
||||
#define SA_ONESHOT SA_RESETHAND
|
||||
|
||||
|
||||
/*
|
||||
* sigaltstack controls
|
||||
*/
|
||||
#define SS_ONSTACK 1
|
||||
#define SS_DISABLE 2
|
||||
|
||||
#define MINSIGSTKSZ 2048
|
||||
#define SIGSTKSZ 8192
|
||||
|
||||
#include <asm-generic/signal-defs.h>
|
||||
|
||||
#ifndef __KERNEL__
|
||||
/* Here we must cater to libcs that poke about in kernel headers. */
|
||||
|
||||
struct sigaction {
|
||||
union {
|
||||
__sighandler_t _sa_handler;
|
||||
void (*_sa_sigaction)(int, struct siginfo *, void *);
|
||||
} _u;
|
||||
sigset_t sa_mask;
|
||||
unsigned long sa_flags;
|
||||
void (*sa_restorer)(void);
|
||||
};
|
||||
|
||||
#define sa_handler _u._sa_handler
|
||||
#define sa_sigaction _u._sa_sigaction
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
typedef struct sigaltstack {
|
||||
void __user *ss_sp;
|
||||
int ss_flags;
|
||||
size_t ss_size;
|
||||
} stack_t;
|
||||
|
||||
|
||||
#endif /* _UAPI_ASMARM_SIGNAL_H */
|
||||
53
arch/arm/include/uapi/asm/swab.h
Normal file
53
arch/arm/include/uapi/asm/swab.h
Normal file
@ -0,0 +1,53 @@
|
||||
/*
|
||||
* arch/arm/include/asm/byteorder.h
|
||||
*
|
||||
* ARM Endian-ness. In little endian mode, the data bus is connected such
|
||||
* that byte accesses appear as:
|
||||
* 0 = d0...d7, 1 = d8...d15, 2 = d16...d23, 3 = d24...d31
|
||||
* and word accesses (data or instruction) appear as:
|
||||
* d0...d31
|
||||
*
|
||||
* When in big endian mode, byte accesses appear as:
|
||||
* 0 = d24...d31, 1 = d16...d23, 2 = d8...d15, 3 = d0...d7
|
||||
* and word accesses (data or instruction) appear as:
|
||||
* d0...d31
|
||||
*/
|
||||
#ifndef _UAPI__ASM_ARM_SWAB_H
|
||||
#define _UAPI__ASM_ARM_SWAB_H
|
||||
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
|
||||
# define __SWAB_64_THRU_32__
|
||||
#endif
|
||||
|
||||
|
||||
#if !defined(__KERNEL__) || __LINUX_ARM_ARCH__ < 6
|
||||
static inline __attribute_const__ __u32 __arch_swab32(__u32 x)
|
||||
{
|
||||
__u32 t;
|
||||
|
||||
#ifndef __thumb__
|
||||
if (!__builtin_constant_p(x)) {
|
||||
/*
|
||||
* The compiler needs a bit of a hint here to always do the
|
||||
* right thing and not screw it up to different degrees
|
||||
* depending on the gcc version.
|
||||
*/
|
||||
asm ("eor\t%0, %1, %1, ror #16" : "=r" (t) : "r" (x));
|
||||
} else
|
||||
#endif
|
||||
t = x ^ ((x << 16) | (x >> 16)); /* eor r1,r0,r0,ror #16 */
|
||||
|
||||
x = (x << 24) | (x >> 8); /* mov r0,r0,ror #8 */
|
||||
t &= ~0x00FF0000; /* bic r1,r1,#0x00FF0000 */
|
||||
x ^= (t >> 8); /* eor r0,r0,r1,lsr #8 */
|
||||
|
||||
return x;
|
||||
}
|
||||
#define __arch_swab32 __arch_swab32
|
||||
|
||||
#endif
|
||||
|
||||
#endif /* _UAPI__ASM_ARM_SWAB_H */
|
||||
450
arch/arm/include/uapi/asm/unistd.h
Normal file
450
arch/arm/include/uapi/asm/unistd.h
Normal file
@ -0,0 +1,450 @@
|
||||
/*
|
||||
* arch/arm/include/asm/unistd.h
|
||||
*
|
||||
* Copyright (C) 2001-2005 Russell King
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* Please forward _all_ changes to this file to rmk@arm.linux.org.uk,
|
||||
* no matter what the change is. Thanks!
|
||||
*/
|
||||
#ifndef _UAPI__ASM_ARM_UNISTD_H
|
||||
#define _UAPI__ASM_ARM_UNISTD_H
|
||||
|
||||
#define __NR_OABI_SYSCALL_BASE 0x900000
|
||||
|
||||
#if defined(__thumb__) || defined(__ARM_EABI__)
|
||||
#define __NR_SYSCALL_BASE 0
|
||||
#else
|
||||
#define __NR_SYSCALL_BASE __NR_OABI_SYSCALL_BASE
|
||||
#endif
|
||||
|
||||
/*
|
||||
* This file contains the system call numbers.
|
||||
*/
|
||||
|
||||
#define __NR_restart_syscall (__NR_SYSCALL_BASE+ 0)
|
||||
#define __NR_exit (__NR_SYSCALL_BASE+ 1)
|
||||
#define __NR_fork (__NR_SYSCALL_BASE+ 2)
|
||||
#define __NR_read (__NR_SYSCALL_BASE+ 3)
|
||||
#define __NR_write (__NR_SYSCALL_BASE+ 4)
|
||||
#define __NR_open (__NR_SYSCALL_BASE+ 5)
|
||||
#define __NR_close (__NR_SYSCALL_BASE+ 6)
|
||||
/* 7 was sys_waitpid */
|
||||
#define __NR_creat (__NR_SYSCALL_BASE+ 8)
|
||||
#define __NR_link (__NR_SYSCALL_BASE+ 9)
|
||||
#define __NR_unlink (__NR_SYSCALL_BASE+ 10)
|
||||
#define __NR_execve (__NR_SYSCALL_BASE+ 11)
|
||||
#define __NR_chdir (__NR_SYSCALL_BASE+ 12)
|
||||
#define __NR_time (__NR_SYSCALL_BASE+ 13)
|
||||
#define __NR_mknod (__NR_SYSCALL_BASE+ 14)
|
||||
#define __NR_chmod (__NR_SYSCALL_BASE+ 15)
|
||||
#define __NR_lchown (__NR_SYSCALL_BASE+ 16)
|
||||
/* 17 was sys_break */
|
||||
/* 18 was sys_stat */
|
||||
#define __NR_lseek (__NR_SYSCALL_BASE+ 19)
|
||||
#define __NR_getpid (__NR_SYSCALL_BASE+ 20)
|
||||
#define __NR_mount (__NR_SYSCALL_BASE+ 21)
|
||||
#define __NR_umount (__NR_SYSCALL_BASE+ 22)
|
||||
#define __NR_setuid (__NR_SYSCALL_BASE+ 23)
|
||||
#define __NR_getuid (__NR_SYSCALL_BASE+ 24)
|
||||
#define __NR_stime (__NR_SYSCALL_BASE+ 25)
|
||||
#define __NR_ptrace (__NR_SYSCALL_BASE+ 26)
|
||||
#define __NR_alarm (__NR_SYSCALL_BASE+ 27)
|
||||
/* 28 was sys_fstat */
|
||||
#define __NR_pause (__NR_SYSCALL_BASE+ 29)
|
||||
#define __NR_utime (__NR_SYSCALL_BASE+ 30)
|
||||
/* 31 was sys_stty */
|
||||
/* 32 was sys_gtty */
|
||||
#define __NR_access (__NR_SYSCALL_BASE+ 33)
|
||||
#define __NR_nice (__NR_SYSCALL_BASE+ 34)
|
||||
/* 35 was sys_ftime */
|
||||
#define __NR_sync (__NR_SYSCALL_BASE+ 36)
|
||||
#define __NR_kill (__NR_SYSCALL_BASE+ 37)
|
||||
#define __NR_rename (__NR_SYSCALL_BASE+ 38)
|
||||
#define __NR_mkdir (__NR_SYSCALL_BASE+ 39)
|
||||
#define __NR_rmdir (__NR_SYSCALL_BASE+ 40)
|
||||
#define __NR_dup (__NR_SYSCALL_BASE+ 41)
|
||||
#define __NR_pipe (__NR_SYSCALL_BASE+ 42)
|
||||
#define __NR_times (__NR_SYSCALL_BASE+ 43)
|
||||
/* 44 was sys_prof */
|
||||
#define __NR_brk (__NR_SYSCALL_BASE+ 45)
|
||||
#define __NR_setgid (__NR_SYSCALL_BASE+ 46)
|
||||
#define __NR_getgid (__NR_SYSCALL_BASE+ 47)
|
||||
/* 48 was sys_signal */
|
||||
#define __NR_geteuid (__NR_SYSCALL_BASE+ 49)
|
||||
#define __NR_getegid (__NR_SYSCALL_BASE+ 50)
|
||||
#define __NR_acct (__NR_SYSCALL_BASE+ 51)
|
||||
#define __NR_umount2 (__NR_SYSCALL_BASE+ 52)
|
||||
/* 53 was sys_lock */
|
||||
#define __NR_ioctl (__NR_SYSCALL_BASE+ 54)
|
||||
#define __NR_fcntl (__NR_SYSCALL_BASE+ 55)
|
||||
/* 56 was sys_mpx */
|
||||
#define __NR_setpgid (__NR_SYSCALL_BASE+ 57)
|
||||
/* 58 was sys_ulimit */
|
||||
/* 59 was sys_olduname */
|
||||
#define __NR_umask (__NR_SYSCALL_BASE+ 60)
|
||||
#define __NR_chroot (__NR_SYSCALL_BASE+ 61)
|
||||
#define __NR_ustat (__NR_SYSCALL_BASE+ 62)
|
||||
#define __NR_dup2 (__NR_SYSCALL_BASE+ 63)
|
||||
#define __NR_getppid (__NR_SYSCALL_BASE+ 64)
|
||||
#define __NR_getpgrp (__NR_SYSCALL_BASE+ 65)
|
||||
#define __NR_setsid (__NR_SYSCALL_BASE+ 66)
|
||||
#define __NR_sigaction (__NR_SYSCALL_BASE+ 67)
|
||||
/* 68 was sys_sgetmask */
|
||||
/* 69 was sys_ssetmask */
|
||||
#define __NR_setreuid (__NR_SYSCALL_BASE+ 70)
|
||||
#define __NR_setregid (__NR_SYSCALL_BASE+ 71)
|
||||
#define __NR_sigsuspend (__NR_SYSCALL_BASE+ 72)
|
||||
#define __NR_sigpending (__NR_SYSCALL_BASE+ 73)
|
||||
#define __NR_sethostname (__NR_SYSCALL_BASE+ 74)
|
||||
#define __NR_setrlimit (__NR_SYSCALL_BASE+ 75)
|
||||
#define __NR_getrlimit (__NR_SYSCALL_BASE+ 76) /* Back compat 2GB limited rlimit */
|
||||
#define __NR_getrusage (__NR_SYSCALL_BASE+ 77)
|
||||
#define __NR_gettimeofday (__NR_SYSCALL_BASE+ 78)
|
||||
#define __NR_settimeofday (__NR_SYSCALL_BASE+ 79)
|
||||
#define __NR_getgroups (__NR_SYSCALL_BASE+ 80)
|
||||
#define __NR_setgroups (__NR_SYSCALL_BASE+ 81)
|
||||
#define __NR_select (__NR_SYSCALL_BASE+ 82)
|
||||
#define __NR_symlink (__NR_SYSCALL_BASE+ 83)
|
||||
/* 84 was sys_lstat */
|
||||
#define __NR_readlink (__NR_SYSCALL_BASE+ 85)
|
||||
#define __NR_uselib (__NR_SYSCALL_BASE+ 86)
|
||||
#define __NR_swapon (__NR_SYSCALL_BASE+ 87)
|
||||
#define __NR_reboot (__NR_SYSCALL_BASE+ 88)
|
||||
#define __NR_readdir (__NR_SYSCALL_BASE+ 89)
|
||||
#define __NR_mmap (__NR_SYSCALL_BASE+ 90)
|
||||
#define __NR_munmap (__NR_SYSCALL_BASE+ 91)
|
||||
#define __NR_truncate (__NR_SYSCALL_BASE+ 92)
|
||||
#define __NR_ftruncate (__NR_SYSCALL_BASE+ 93)
|
||||
#define __NR_fchmod (__NR_SYSCALL_BASE+ 94)
|
||||
#define __NR_fchown (__NR_SYSCALL_BASE+ 95)
|
||||
#define __NR_getpriority (__NR_SYSCALL_BASE+ 96)
|
||||
#define __NR_setpriority (__NR_SYSCALL_BASE+ 97)
|
||||
/* 98 was sys_profil */
|
||||
#define __NR_statfs (__NR_SYSCALL_BASE+ 99)
|
||||
#define __NR_fstatfs (__NR_SYSCALL_BASE+100)
|
||||
/* 101 was sys_ioperm */
|
||||
#define __NR_socketcall (__NR_SYSCALL_BASE+102)
|
||||
#define __NR_syslog (__NR_SYSCALL_BASE+103)
|
||||
#define __NR_setitimer (__NR_SYSCALL_BASE+104)
|
||||
#define __NR_getitimer (__NR_SYSCALL_BASE+105)
|
||||
#define __NR_stat (__NR_SYSCALL_BASE+106)
|
||||
#define __NR_lstat (__NR_SYSCALL_BASE+107)
|
||||
#define __NR_fstat (__NR_SYSCALL_BASE+108)
|
||||
/* 109 was sys_uname */
|
||||
/* 110 was sys_iopl */
|
||||
#define __NR_vhangup (__NR_SYSCALL_BASE+111)
|
||||
/* 112 was sys_idle */
|
||||
#define __NR_syscall (__NR_SYSCALL_BASE+113) /* syscall to call a syscall! */
|
||||
#define __NR_wait4 (__NR_SYSCALL_BASE+114)
|
||||
#define __NR_swapoff (__NR_SYSCALL_BASE+115)
|
||||
#define __NR_sysinfo (__NR_SYSCALL_BASE+116)
|
||||
#define __NR_ipc (__NR_SYSCALL_BASE+117)
|
||||
#define __NR_fsync (__NR_SYSCALL_BASE+118)
|
||||
#define __NR_sigreturn (__NR_SYSCALL_BASE+119)
|
||||
#define __NR_clone (__NR_SYSCALL_BASE+120)
|
||||
#define __NR_setdomainname (__NR_SYSCALL_BASE+121)
|
||||
#define __NR_uname (__NR_SYSCALL_BASE+122)
|
||||
/* 123 was sys_modify_ldt */
|
||||
#define __NR_adjtimex (__NR_SYSCALL_BASE+124)
|
||||
#define __NR_mprotect (__NR_SYSCALL_BASE+125)
|
||||
#define __NR_sigprocmask (__NR_SYSCALL_BASE+126)
|
||||
/* 127 was sys_create_module */
|
||||
#define __NR_init_module (__NR_SYSCALL_BASE+128)
|
||||
#define __NR_delete_module (__NR_SYSCALL_BASE+129)
|
||||
/* 130 was sys_get_kernel_syms */
|
||||
#define __NR_quotactl (__NR_SYSCALL_BASE+131)
|
||||
#define __NR_getpgid (__NR_SYSCALL_BASE+132)
|
||||
#define __NR_fchdir (__NR_SYSCALL_BASE+133)
|
||||
#define __NR_bdflush (__NR_SYSCALL_BASE+134)
|
||||
#define __NR_sysfs (__NR_SYSCALL_BASE+135)
|
||||
#define __NR_personality (__NR_SYSCALL_BASE+136)
|
||||
/* 137 was sys_afs_syscall */
|
||||
#define __NR_setfsuid (__NR_SYSCALL_BASE+138)
|
||||
#define __NR_setfsgid (__NR_SYSCALL_BASE+139)
|
||||
#define __NR__llseek (__NR_SYSCALL_BASE+140)
|
||||
#define __NR_getdents (__NR_SYSCALL_BASE+141)
|
||||
#define __NR__newselect (__NR_SYSCALL_BASE+142)
|
||||
#define __NR_flock (__NR_SYSCALL_BASE+143)
|
||||
#define __NR_msync (__NR_SYSCALL_BASE+144)
|
||||
#define __NR_readv (__NR_SYSCALL_BASE+145)
|
||||
#define __NR_writev (__NR_SYSCALL_BASE+146)
|
||||
#define __NR_getsid (__NR_SYSCALL_BASE+147)
|
||||
#define __NR_fdatasync (__NR_SYSCALL_BASE+148)
|
||||
#define __NR__sysctl (__NR_SYSCALL_BASE+149)
|
||||
#define __NR_mlock (__NR_SYSCALL_BASE+150)
|
||||
#define __NR_munlock (__NR_SYSCALL_BASE+151)
|
||||
#define __NR_mlockall (__NR_SYSCALL_BASE+152)
|
||||
#define __NR_munlockall (__NR_SYSCALL_BASE+153)
|
||||
#define __NR_sched_setparam (__NR_SYSCALL_BASE+154)
|
||||
#define __NR_sched_getparam (__NR_SYSCALL_BASE+155)
|
||||
#define __NR_sched_setscheduler (__NR_SYSCALL_BASE+156)
|
||||
#define __NR_sched_getscheduler (__NR_SYSCALL_BASE+157)
|
||||
#define __NR_sched_yield (__NR_SYSCALL_BASE+158)
|
||||
#define __NR_sched_get_priority_max (__NR_SYSCALL_BASE+159)
|
||||
#define __NR_sched_get_priority_min (__NR_SYSCALL_BASE+160)
|
||||
#define __NR_sched_rr_get_interval (__NR_SYSCALL_BASE+161)
|
||||
#define __NR_nanosleep (__NR_SYSCALL_BASE+162)
|
||||
#define __NR_mremap (__NR_SYSCALL_BASE+163)
|
||||
#define __NR_setresuid (__NR_SYSCALL_BASE+164)
|
||||
#define __NR_getresuid (__NR_SYSCALL_BASE+165)
|
||||
/* 166 was sys_vm86 */
|
||||
/* 167 was sys_query_module */
|
||||
#define __NR_poll (__NR_SYSCALL_BASE+168)
|
||||
#define __NR_nfsservctl (__NR_SYSCALL_BASE+169)
|
||||
#define __NR_setresgid (__NR_SYSCALL_BASE+170)
|
||||
#define __NR_getresgid (__NR_SYSCALL_BASE+171)
|
||||
#define __NR_prctl (__NR_SYSCALL_BASE+172)
|
||||
#define __NR_rt_sigreturn (__NR_SYSCALL_BASE+173)
|
||||
#define __NR_rt_sigaction (__NR_SYSCALL_BASE+174)
|
||||
#define __NR_rt_sigprocmask (__NR_SYSCALL_BASE+175)
|
||||
#define __NR_rt_sigpending (__NR_SYSCALL_BASE+176)
|
||||
#define __NR_rt_sigtimedwait (__NR_SYSCALL_BASE+177)
|
||||
#define __NR_rt_sigqueueinfo (__NR_SYSCALL_BASE+178)
|
||||
#define __NR_rt_sigsuspend (__NR_SYSCALL_BASE+179)
|
||||
#define __NR_pread64 (__NR_SYSCALL_BASE+180)
|
||||
#define __NR_pwrite64 (__NR_SYSCALL_BASE+181)
|
||||
#define __NR_chown (__NR_SYSCALL_BASE+182)
|
||||
#define __NR_getcwd (__NR_SYSCALL_BASE+183)
|
||||
#define __NR_capget (__NR_SYSCALL_BASE+184)
|
||||
#define __NR_capset (__NR_SYSCALL_BASE+185)
|
||||
#define __NR_sigaltstack (__NR_SYSCALL_BASE+186)
|
||||
#define __NR_sendfile (__NR_SYSCALL_BASE+187)
|
||||
/* 188 reserved */
|
||||
/* 189 reserved */
|
||||
#define __NR_vfork (__NR_SYSCALL_BASE+190)
|
||||
#define __NR_ugetrlimit (__NR_SYSCALL_BASE+191) /* SuS compliant getrlimit */
|
||||
#define __NR_mmap2 (__NR_SYSCALL_BASE+192)
|
||||
#define __NR_truncate64 (__NR_SYSCALL_BASE+193)
|
||||
#define __NR_ftruncate64 (__NR_SYSCALL_BASE+194)
|
||||
#define __NR_stat64 (__NR_SYSCALL_BASE+195)
|
||||
#define __NR_lstat64 (__NR_SYSCALL_BASE+196)
|
||||
#define __NR_fstat64 (__NR_SYSCALL_BASE+197)
|
||||
#define __NR_lchown32 (__NR_SYSCALL_BASE+198)
|
||||
#define __NR_getuid32 (__NR_SYSCALL_BASE+199)
|
||||
#define __NR_getgid32 (__NR_SYSCALL_BASE+200)
|
||||
#define __NR_geteuid32 (__NR_SYSCALL_BASE+201)
|
||||
#define __NR_getegid32 (__NR_SYSCALL_BASE+202)
|
||||
#define __NR_setreuid32 (__NR_SYSCALL_BASE+203)
|
||||
#define __NR_setregid32 (__NR_SYSCALL_BASE+204)
|
||||
#define __NR_getgroups32 (__NR_SYSCALL_BASE+205)
|
||||
#define __NR_setgroups32 (__NR_SYSCALL_BASE+206)
|
||||
#define __NR_fchown32 (__NR_SYSCALL_BASE+207)
|
||||
#define __NR_setresuid32 (__NR_SYSCALL_BASE+208)
|
||||
#define __NR_getresuid32 (__NR_SYSCALL_BASE+209)
|
||||
#define __NR_setresgid32 (__NR_SYSCALL_BASE+210)
|
||||
#define __NR_getresgid32 (__NR_SYSCALL_BASE+211)
|
||||
#define __NR_chown32 (__NR_SYSCALL_BASE+212)
|
||||
#define __NR_setuid32 (__NR_SYSCALL_BASE+213)
|
||||
#define __NR_setgid32 (__NR_SYSCALL_BASE+214)
|
||||
#define __NR_setfsuid32 (__NR_SYSCALL_BASE+215)
|
||||
#define __NR_setfsgid32 (__NR_SYSCALL_BASE+216)
|
||||
#define __NR_getdents64 (__NR_SYSCALL_BASE+217)
|
||||
#define __NR_pivot_root (__NR_SYSCALL_BASE+218)
|
||||
#define __NR_mincore (__NR_SYSCALL_BASE+219)
|
||||
#define __NR_madvise (__NR_SYSCALL_BASE+220)
|
||||
#define __NR_fcntl64 (__NR_SYSCALL_BASE+221)
|
||||
/* 222 for tux */
|
||||
/* 223 is unused */
|
||||
#define __NR_gettid (__NR_SYSCALL_BASE+224)
|
||||
#define __NR_readahead (__NR_SYSCALL_BASE+225)
|
||||
#define __NR_setxattr (__NR_SYSCALL_BASE+226)
|
||||
#define __NR_lsetxattr (__NR_SYSCALL_BASE+227)
|
||||
#define __NR_fsetxattr (__NR_SYSCALL_BASE+228)
|
||||
#define __NR_getxattr (__NR_SYSCALL_BASE+229)
|
||||
#define __NR_lgetxattr (__NR_SYSCALL_BASE+230)
|
||||
#define __NR_fgetxattr (__NR_SYSCALL_BASE+231)
|
||||
#define __NR_listxattr (__NR_SYSCALL_BASE+232)
|
||||
#define __NR_llistxattr (__NR_SYSCALL_BASE+233)
|
||||
#define __NR_flistxattr (__NR_SYSCALL_BASE+234)
|
||||
#define __NR_removexattr (__NR_SYSCALL_BASE+235)
|
||||
#define __NR_lremovexattr (__NR_SYSCALL_BASE+236)
|
||||
#define __NR_fremovexattr (__NR_SYSCALL_BASE+237)
|
||||
#define __NR_tkill (__NR_SYSCALL_BASE+238)
|
||||
#define __NR_sendfile64 (__NR_SYSCALL_BASE+239)
|
||||
#define __NR_futex (__NR_SYSCALL_BASE+240)
|
||||
#define __NR_sched_setaffinity (__NR_SYSCALL_BASE+241)
|
||||
#define __NR_sched_getaffinity (__NR_SYSCALL_BASE+242)
|
||||
#define __NR_io_setup (__NR_SYSCALL_BASE+243)
|
||||
#define __NR_io_destroy (__NR_SYSCALL_BASE+244)
|
||||
#define __NR_io_getevents (__NR_SYSCALL_BASE+245)
|
||||
#define __NR_io_submit (__NR_SYSCALL_BASE+246)
|
||||
#define __NR_io_cancel (__NR_SYSCALL_BASE+247)
|
||||
#define __NR_exit_group (__NR_SYSCALL_BASE+248)
|
||||
#define __NR_lookup_dcookie (__NR_SYSCALL_BASE+249)
|
||||
#define __NR_epoll_create (__NR_SYSCALL_BASE+250)
|
||||
#define __NR_epoll_ctl (__NR_SYSCALL_BASE+251)
|
||||
#define __NR_epoll_wait (__NR_SYSCALL_BASE+252)
|
||||
#define __NR_remap_file_pages (__NR_SYSCALL_BASE+253)
|
||||
/* 254 for set_thread_area */
|
||||
/* 255 for get_thread_area */
|
||||
#define __NR_set_tid_address (__NR_SYSCALL_BASE+256)
|
||||
#define __NR_timer_create (__NR_SYSCALL_BASE+257)
|
||||
#define __NR_timer_settime (__NR_SYSCALL_BASE+258)
|
||||
#define __NR_timer_gettime (__NR_SYSCALL_BASE+259)
|
||||
#define __NR_timer_getoverrun (__NR_SYSCALL_BASE+260)
|
||||
#define __NR_timer_delete (__NR_SYSCALL_BASE+261)
|
||||
#define __NR_clock_settime (__NR_SYSCALL_BASE+262)
|
||||
#define __NR_clock_gettime (__NR_SYSCALL_BASE+263)
|
||||
#define __NR_clock_getres (__NR_SYSCALL_BASE+264)
|
||||
#define __NR_clock_nanosleep (__NR_SYSCALL_BASE+265)
|
||||
#define __NR_statfs64 (__NR_SYSCALL_BASE+266)
|
||||
#define __NR_fstatfs64 (__NR_SYSCALL_BASE+267)
|
||||
#define __NR_tgkill (__NR_SYSCALL_BASE+268)
|
||||
#define __NR_utimes (__NR_SYSCALL_BASE+269)
|
||||
#define __NR_arm_fadvise64_64 (__NR_SYSCALL_BASE+270)
|
||||
#define __NR_pciconfig_iobase (__NR_SYSCALL_BASE+271)
|
||||
#define __NR_pciconfig_read (__NR_SYSCALL_BASE+272)
|
||||
#define __NR_pciconfig_write (__NR_SYSCALL_BASE+273)
|
||||
#define __NR_mq_open (__NR_SYSCALL_BASE+274)
|
||||
#define __NR_mq_unlink (__NR_SYSCALL_BASE+275)
|
||||
#define __NR_mq_timedsend (__NR_SYSCALL_BASE+276)
|
||||
#define __NR_mq_timedreceive (__NR_SYSCALL_BASE+277)
|
||||
#define __NR_mq_notify (__NR_SYSCALL_BASE+278)
|
||||
#define __NR_mq_getsetattr (__NR_SYSCALL_BASE+279)
|
||||
#define __NR_waitid (__NR_SYSCALL_BASE+280)
|
||||
#define __NR_socket (__NR_SYSCALL_BASE+281)
|
||||
#define __NR_bind (__NR_SYSCALL_BASE+282)
|
||||
#define __NR_connect (__NR_SYSCALL_BASE+283)
|
||||
#define __NR_listen (__NR_SYSCALL_BASE+284)
|
||||
#define __NR_accept (__NR_SYSCALL_BASE+285)
|
||||
#define __NR_getsockname (__NR_SYSCALL_BASE+286)
|
||||
#define __NR_getpeername (__NR_SYSCALL_BASE+287)
|
||||
#define __NR_socketpair (__NR_SYSCALL_BASE+288)
|
||||
#define __NR_send (__NR_SYSCALL_BASE+289)
|
||||
#define __NR_sendto (__NR_SYSCALL_BASE+290)
|
||||
#define __NR_recv (__NR_SYSCALL_BASE+291)
|
||||
#define __NR_recvfrom (__NR_SYSCALL_BASE+292)
|
||||
#define __NR_shutdown (__NR_SYSCALL_BASE+293)
|
||||
#define __NR_setsockopt (__NR_SYSCALL_BASE+294)
|
||||
#define __NR_getsockopt (__NR_SYSCALL_BASE+295)
|
||||
#define __NR_sendmsg (__NR_SYSCALL_BASE+296)
|
||||
#define __NR_recvmsg (__NR_SYSCALL_BASE+297)
|
||||
#define __NR_semop (__NR_SYSCALL_BASE+298)
|
||||
#define __NR_semget (__NR_SYSCALL_BASE+299)
|
||||
#define __NR_semctl (__NR_SYSCALL_BASE+300)
|
||||
#define __NR_msgsnd (__NR_SYSCALL_BASE+301)
|
||||
#define __NR_msgrcv (__NR_SYSCALL_BASE+302)
|
||||
#define __NR_msgget (__NR_SYSCALL_BASE+303)
|
||||
#define __NR_msgctl (__NR_SYSCALL_BASE+304)
|
||||
#define __NR_shmat (__NR_SYSCALL_BASE+305)
|
||||
#define __NR_shmdt (__NR_SYSCALL_BASE+306)
|
||||
#define __NR_shmget (__NR_SYSCALL_BASE+307)
|
||||
#define __NR_shmctl (__NR_SYSCALL_BASE+308)
|
||||
#define __NR_add_key (__NR_SYSCALL_BASE+309)
|
||||
#define __NR_request_key (__NR_SYSCALL_BASE+310)
|
||||
#define __NR_keyctl (__NR_SYSCALL_BASE+311)
|
||||
#define __NR_semtimedop (__NR_SYSCALL_BASE+312)
|
||||
#define __NR_vserver (__NR_SYSCALL_BASE+313)
|
||||
#define __NR_ioprio_set (__NR_SYSCALL_BASE+314)
|
||||
#define __NR_ioprio_get (__NR_SYSCALL_BASE+315)
|
||||
#define __NR_inotify_init (__NR_SYSCALL_BASE+316)
|
||||
#define __NR_inotify_add_watch (__NR_SYSCALL_BASE+317)
|
||||
#define __NR_inotify_rm_watch (__NR_SYSCALL_BASE+318)
|
||||
#define __NR_mbind (__NR_SYSCALL_BASE+319)
|
||||
#define __NR_get_mempolicy (__NR_SYSCALL_BASE+320)
|
||||
#define __NR_set_mempolicy (__NR_SYSCALL_BASE+321)
|
||||
#define __NR_openat (__NR_SYSCALL_BASE+322)
|
||||
#define __NR_mkdirat (__NR_SYSCALL_BASE+323)
|
||||
#define __NR_mknodat (__NR_SYSCALL_BASE+324)
|
||||
#define __NR_fchownat (__NR_SYSCALL_BASE+325)
|
||||
#define __NR_futimesat (__NR_SYSCALL_BASE+326)
|
||||
#define __NR_fstatat64 (__NR_SYSCALL_BASE+327)
|
||||
#define __NR_unlinkat (__NR_SYSCALL_BASE+328)
|
||||
#define __NR_renameat (__NR_SYSCALL_BASE+329)
|
||||
#define __NR_linkat (__NR_SYSCALL_BASE+330)
|
||||
#define __NR_symlinkat (__NR_SYSCALL_BASE+331)
|
||||
#define __NR_readlinkat (__NR_SYSCALL_BASE+332)
|
||||
#define __NR_fchmodat (__NR_SYSCALL_BASE+333)
|
||||
#define __NR_faccessat (__NR_SYSCALL_BASE+334)
|
||||
#define __NR_pselect6 (__NR_SYSCALL_BASE+335)
|
||||
#define __NR_ppoll (__NR_SYSCALL_BASE+336)
|
||||
#define __NR_unshare (__NR_SYSCALL_BASE+337)
|
||||
#define __NR_set_robust_list (__NR_SYSCALL_BASE+338)
|
||||
#define __NR_get_robust_list (__NR_SYSCALL_BASE+339)
|
||||
#define __NR_splice (__NR_SYSCALL_BASE+340)
|
||||
#define __NR_arm_sync_file_range (__NR_SYSCALL_BASE+341)
|
||||
#define __NR_sync_file_range2 __NR_arm_sync_file_range
|
||||
#define __NR_tee (__NR_SYSCALL_BASE+342)
|
||||
#define __NR_vmsplice (__NR_SYSCALL_BASE+343)
|
||||
#define __NR_move_pages (__NR_SYSCALL_BASE+344)
|
||||
#define __NR_getcpu (__NR_SYSCALL_BASE+345)
|
||||
#define __NR_epoll_pwait (__NR_SYSCALL_BASE+346)
|
||||
#define __NR_kexec_load (__NR_SYSCALL_BASE+347)
|
||||
#define __NR_utimensat (__NR_SYSCALL_BASE+348)
|
||||
#define __NR_signalfd (__NR_SYSCALL_BASE+349)
|
||||
#define __NR_timerfd_create (__NR_SYSCALL_BASE+350)
|
||||
#define __NR_eventfd (__NR_SYSCALL_BASE+351)
|
||||
#define __NR_fallocate (__NR_SYSCALL_BASE+352)
|
||||
#define __NR_timerfd_settime (__NR_SYSCALL_BASE+353)
|
||||
#define __NR_timerfd_gettime (__NR_SYSCALL_BASE+354)
|
||||
#define __NR_signalfd4 (__NR_SYSCALL_BASE+355)
|
||||
#define __NR_eventfd2 (__NR_SYSCALL_BASE+356)
|
||||
#define __NR_epoll_create1 (__NR_SYSCALL_BASE+357)
|
||||
#define __NR_dup3 (__NR_SYSCALL_BASE+358)
|
||||
#define __NR_pipe2 (__NR_SYSCALL_BASE+359)
|
||||
#define __NR_inotify_init1 (__NR_SYSCALL_BASE+360)
|
||||
#define __NR_preadv (__NR_SYSCALL_BASE+361)
|
||||
#define __NR_pwritev (__NR_SYSCALL_BASE+362)
|
||||
#define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363)
|
||||
#define __NR_perf_event_open (__NR_SYSCALL_BASE+364)
|
||||
#define __NR_recvmmsg (__NR_SYSCALL_BASE+365)
|
||||
#define __NR_accept4 (__NR_SYSCALL_BASE+366)
|
||||
#define __NR_fanotify_init (__NR_SYSCALL_BASE+367)
|
||||
#define __NR_fanotify_mark (__NR_SYSCALL_BASE+368)
|
||||
#define __NR_prlimit64 (__NR_SYSCALL_BASE+369)
|
||||
#define __NR_name_to_handle_at (__NR_SYSCALL_BASE+370)
|
||||
#define __NR_open_by_handle_at (__NR_SYSCALL_BASE+371)
|
||||
#define __NR_clock_adjtime (__NR_SYSCALL_BASE+372)
|
||||
#define __NR_syncfs (__NR_SYSCALL_BASE+373)
|
||||
#define __NR_sendmmsg (__NR_SYSCALL_BASE+374)
|
||||
#define __NR_setns (__NR_SYSCALL_BASE+375)
|
||||
#define __NR_process_vm_readv (__NR_SYSCALL_BASE+376)
|
||||
#define __NR_process_vm_writev (__NR_SYSCALL_BASE+377)
|
||||
/* 378 for kcmp */
|
||||
|
||||
/*
|
||||
* This may need to be greater than __NR_last_syscall+1 in order to
|
||||
* account for the padding in the syscall table
|
||||
*/
|
||||
|
||||
/*
|
||||
* The following SWIs are ARM private.
|
||||
*/
|
||||
#define __ARM_NR_BASE (__NR_SYSCALL_BASE+0x0f0000)
|
||||
#define __ARM_NR_breakpoint (__ARM_NR_BASE+1)
|
||||
#define __ARM_NR_cacheflush (__ARM_NR_BASE+2)
|
||||
#define __ARM_NR_usr26 (__ARM_NR_BASE+3)
|
||||
#define __ARM_NR_usr32 (__ARM_NR_BASE+4)
|
||||
#define __ARM_NR_set_tls (__ARM_NR_BASE+5)
|
||||
|
||||
/*
|
||||
* *NOTE*: This is a ghost syscall private to the kernel. Only the
|
||||
* __kuser_cmpxchg code in entry-armv.S should be aware of its
|
||||
* existence. Don't ever use this from user code.
|
||||
*/
|
||||
|
||||
/*
|
||||
* The following syscalls are obsolete and no longer available for EABI.
|
||||
*/
|
||||
#if !defined(__KERNEL__)
|
||||
#if defined(__ARM_EABI__)
|
||||
#undef __NR_time
|
||||
#undef __NR_umount
|
||||
#undef __NR_stime
|
||||
#undef __NR_alarm
|
||||
#undef __NR_utime
|
||||
#undef __NR_getrlimit
|
||||
#undef __NR_select
|
||||
#undef __NR_readdir
|
||||
#undef __NR_mmap
|
||||
#undef __NR_socketcall
|
||||
#undef __NR_syscall
|
||||
#undef __NR_ipc
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif /* _UAPI__ASM_ARM_UNISTD_H */
|
||||
@ -19,8 +19,8 @@ config AT91_SAM9G45_RESET
|
||||
|
||||
config SOC_AT91SAM9
|
||||
bool
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select CPU_ARM926T
|
||||
select GENERIC_CLOCKEVENTS
|
||||
|
||||
menu "Atmel AT91 System-on-Chip"
|
||||
|
||||
@ -28,66 +28,66 @@ comment "Atmel AT91 Processor"
|
||||
|
||||
config SOC_AT91SAM9
|
||||
bool
|
||||
select AT91_SAM9_SMC
|
||||
select AT91_SAM9_TIME
|
||||
select CPU_ARM926T
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SPARSE_IRQ
|
||||
select AT91_SAM9_TIME
|
||||
select AT91_SAM9_SMC
|
||||
|
||||
config SOC_AT91RM9200
|
||||
bool "AT91RM9200"
|
||||
select CPU_ARM920T
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SPARSE_IRQ
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select HAVE_AT91_DBGU0
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SPARSE_IRQ
|
||||
|
||||
config SOC_AT91SAM9260
|
||||
bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_NET_MACB
|
||||
select SOC_AT91SAM9
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE
|
||||
or AT91SAM9G20 SoC.
|
||||
|
||||
config SOC_AT91SAM9261
|
||||
bool "AT91SAM9261 or AT91SAM9G10"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC.
|
||||
|
||||
config SOC_AT91SAM9263
|
||||
bool "AT91SAM9263"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU1
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select SOC_AT91SAM9
|
||||
|
||||
config SOC_AT91SAM9RL
|
||||
bool "AT91SAM9RL"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9
|
||||
|
||||
config SOC_AT91SAM9G45
|
||||
bool "AT91SAM9G45 or AT91SAM9M10 families"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU1
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select SOC_AT91SAM9
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9G45 family SoC.
|
||||
This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11.
|
||||
|
||||
config SOC_AT91SAM9X5
|
||||
bool "AT91SAM9x5 family"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select HAVE_NET_MACB
|
||||
select SOC_AT91SAM9
|
||||
help
|
||||
Select this if you are using one of Atmel's AT91SAM9x5 family SoC.
|
||||
This means that your SAM9 name finishes with a '5' (except if it is
|
||||
@ -97,9 +97,9 @@ config SOC_AT91SAM9X5
|
||||
|
||||
config SOC_AT91SAM9N12
|
||||
bool "AT91SAM9N12 family"
|
||||
select SOC_AT91SAM9
|
||||
select HAVE_AT91_DBGU0
|
||||
select HAVE_FB_ATMEL
|
||||
select SOC_AT91SAM9
|
||||
help
|
||||
Select this if you are using Atmel's AT91SAM9N12 SoC.
|
||||
|
||||
@ -144,9 +144,9 @@ config ARCH_AT91SAM9G45
|
||||
config ARCH_AT91X40
|
||||
bool "AT91x40"
|
||||
depends on !MMU
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SPARSE_IRQ
|
||||
select ARCH_USES_GETTIMEOFFSET
|
||||
|
||||
endchoice
|
||||
|
||||
|
||||
@ -23,9 +23,9 @@ config ARCH_CLEP7312
|
||||
|
||||
config ARCH_EDB7211
|
||||
bool "EDB7211"
|
||||
select ISA
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
select ARCH_SELECT_MEMORY_MODEL
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
select ISA
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a Cirrus Logic EDB-7211
|
||||
evaluation board.
|
||||
|
||||
@ -4,12 +4,12 @@ config AINTC
|
||||
bool
|
||||
|
||||
config CP_INTC
|
||||
select IRQ_DOMAIN
|
||||
bool
|
||||
select IRQ_DOMAIN
|
||||
|
||||
config ARCH_DAVINCI_DMx
|
||||
select CPU_ARM926T
|
||||
bool
|
||||
select CPU_ARM926T
|
||||
|
||||
menu "TI DaVinci Implementations"
|
||||
|
||||
@ -32,19 +32,19 @@ config ARCH_DAVINCI_DM646x
|
||||
|
||||
config ARCH_DAVINCI_DA830
|
||||
bool "DA830/OMAP-L137/AM17x based system"
|
||||
select CP_INTC
|
||||
select ARCH_DAVINCI_DA8XX
|
||||
select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
|
||||
select CP_INTC
|
||||
|
||||
config ARCH_DAVINCI_DA850
|
||||
bool "DA850/OMAP-L138/AM18x based system"
|
||||
select CP_INTC
|
||||
select ARCH_DAVINCI_DA8XX
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select CP_INTC
|
||||
|
||||
config ARCH_DAVINCI_DA8XX
|
||||
select CPU_ARM926T
|
||||
bool
|
||||
select CPU_ARM926T
|
||||
|
||||
config ARCH_DAVINCI_DM365
|
||||
bool "DaVinci 365 based system"
|
||||
@ -52,9 +52,9 @@ config ARCH_DAVINCI_DM365
|
||||
select ARCH_DAVINCI_DMx
|
||||
|
||||
config ARCH_DAVINCI_TNETV107X
|
||||
bool "TNETV107X based system"
|
||||
select CPU_V6
|
||||
select CP_INTC
|
||||
bool "TNETV107X based system"
|
||||
|
||||
comment "DaVinci Board Type"
|
||||
|
||||
@ -103,9 +103,9 @@ config MACH_DAVINCI_DM6467_EVM
|
||||
bool "TI DM6467 EVM"
|
||||
default ARCH_DAVINCI_DM646x
|
||||
depends on ARCH_DAVINCI_DM646x
|
||||
select MACH_DAVINCI_DM6467TEVM
|
||||
select EEPROM_AT24
|
||||
select I2C
|
||||
select MACH_DAVINCI_DM6467TEVM
|
||||
help
|
||||
Configure this option to specify the whether the board used
|
||||
for development is a DM6467 EVM
|
||||
@ -127,8 +127,8 @@ config MACH_DAVINCI_DA830_EVM
|
||||
bool "TI DA830/OMAP-L137/AM17x Reference Platform"
|
||||
default ARCH_DAVINCI_DA830
|
||||
depends on ARCH_DAVINCI_DA830
|
||||
select GPIO_PCF857X
|
||||
select EEPROM_AT24
|
||||
select GPIO_PCF857X
|
||||
select I2C
|
||||
help
|
||||
Say Y here to select the TI DA830/OMAP-L137/AM17x Evaluation Module.
|
||||
|
||||
@ -31,11 +31,11 @@ config CPU_EXYNOS4210
|
||||
bool "SAMSUNG EXYNOS4210"
|
||||
default y
|
||||
depends on ARCH_EXYNOS4
|
||||
select SAMSUNG_DMADEV
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select PM_GENERIC_DOMAINS
|
||||
select S5P_PM if PM
|
||||
select S5P_SLEEP if PM
|
||||
select PM_GENERIC_DOMAINS
|
||||
select SAMSUNG_DMADEV
|
||||
help
|
||||
Enable EXYNOS4210 CPU support
|
||||
|
||||
@ -43,9 +43,9 @@ config SOC_EXYNOS4212
|
||||
bool "SAMSUNG EXYNOS4212"
|
||||
default y
|
||||
depends on ARCH_EXYNOS4
|
||||
select SAMSUNG_DMADEV
|
||||
select S5P_PM if PM
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
help
|
||||
Enable EXYNOS4212 SoC support
|
||||
|
||||
@ -61,9 +61,9 @@ config SOC_EXYNOS5250
|
||||
bool "SAMSUNG EXYNOS5250"
|
||||
default y
|
||||
depends on ARCH_EXYNOS5
|
||||
select SAMSUNG_DMADEV
|
||||
select S5P_PM if PM
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
help
|
||||
Enable EXYNOS5250 SoC support
|
||||
|
||||
@ -189,71 +189,71 @@ config MACH_SMDKC210
|
||||
config MACH_SMDKV310
|
||||
bool "SMDKV310"
|
||||
select CPU_EXYNOS4210
|
||||
select S5P_DEV_FIMD0
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select S3C_DEV_I2C1
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_FIMC3
|
||||
select S5P_DEV_G2D
|
||||
select S5P_DEV_I2C_HDMIPHY
|
||||
select S5P_DEV_JPEG
|
||||
select S5P_DEV_MFC
|
||||
select S5P_DEV_TV
|
||||
select S5P_DEV_USB_EHCI
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select EXYNOS4_DEV_AHCI
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select EXYNOS_DEV_DMA
|
||||
select SAMSUNG_DEV_PWM
|
||||
select EXYNOS4_DEV_USB_OHCI
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
select EXYNOS4_SETUP_KEYPAD
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select S3C24XX_PWM
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_WDT
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_FIMC3
|
||||
select S5P_DEV_FIMD0
|
||||
select S5P_DEV_G2D
|
||||
select S5P_DEV_I2C_HDMIPHY
|
||||
select S5P_DEV_JPEG
|
||||
select S5P_DEV_MFC
|
||||
select S5P_DEV_TV
|
||||
select S5P_DEV_USB_EHCI
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select SAMSUNG_DEV_PWM
|
||||
help
|
||||
Machine support for Samsung SMDKV310
|
||||
|
||||
config MACH_ARMLEX4210
|
||||
bool "ARMLEX4210"
|
||||
select CPU_EXYNOS4210
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select EXYNOS4_DEV_AHCI
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS_DEV_DMA
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select EXYNOS4_DEV_AHCI
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
help
|
||||
Machine support for Samsung ARMLEX4210 based on EXYNOS4210
|
||||
|
||||
config MACH_UNIVERSAL_C210
|
||||
bool "Mobile UNIVERSAL_C210 Board"
|
||||
select CPU_EXYNOS4210
|
||||
select S5P_HRT
|
||||
select CLKSRC_MMIO
|
||||
select CPU_EXYNOS4210
|
||||
select EXYNOS4_SETUP_FIMC
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
select EXYNOS4_SETUP_I2C3
|
||||
select EXYNOS4_SETUP_I2C5
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select HAVE_SCHED_CLOCK
|
||||
select S5P_GPIO_INT
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_FIMC3
|
||||
select S5P_DEV_G2D
|
||||
select S5P_DEV_CSIS0
|
||||
select S5P_DEV_JPEG
|
||||
select S5P_DEV_FIMD0
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
@ -261,21 +261,21 @@ config MACH_UNIVERSAL_C210
|
||||
select S3C_DEV_I2C3
|
||||
select S3C_DEV_I2C5
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S5P_DEV_CSIS0
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_FIMC3
|
||||
select S5P_DEV_FIMD0
|
||||
select S5P_DEV_G2D
|
||||
select S5P_DEV_I2C_HDMIPHY
|
||||
select S5P_DEV_JPEG
|
||||
select S5P_DEV_MFC
|
||||
select S5P_DEV_ONENAND
|
||||
select S5P_DEV_TV
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
select EXYNOS4_SETUP_I2C3
|
||||
select EXYNOS4_SETUP_I2C5
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_FIMC
|
||||
select S5P_GPIO_INT
|
||||
select S5P_HRT
|
||||
select S5P_SETUP_MIPIPHY
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
help
|
||||
Machine support for Samsung Mobile Universal S5PC210 Reference
|
||||
Board.
|
||||
@ -283,30 +283,6 @@ config MACH_UNIVERSAL_C210
|
||||
config MACH_NURI
|
||||
bool "Mobile NURI Board"
|
||||
select CPU_EXYNOS4210
|
||||
select S5P_GPIO_INT
|
||||
select S3C_DEV_WDT
|
||||
select S3C_DEV_RTC
|
||||
select S5P_DEV_FIMD0
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_I2C3
|
||||
select S3C_DEV_I2C5
|
||||
select S3C_DEV_I2C6
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S5P_DEV_CSIS0
|
||||
select S5P_DEV_JPEG
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_FIMC3
|
||||
select S5P_DEV_G2D
|
||||
select S5P_DEV_MFC
|
||||
select S5P_DEV_USB_EHCI
|
||||
select S5P_SETUP_MIPIPHY
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS4_SETUP_FIMC
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
@ -315,20 +291,51 @@ config MACH_NURI
|
||||
select EXYNOS4_SETUP_I2C6
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_I2C3
|
||||
select S3C_DEV_I2C5
|
||||
select S3C_DEV_I2C6
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_WDT
|
||||
select S5P_DEV_CSIS0
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_FIMC3
|
||||
select S5P_DEV_FIMD0
|
||||
select S5P_DEV_G2D
|
||||
select S5P_DEV_JPEG
|
||||
select S5P_DEV_MFC
|
||||
select S5P_DEV_USB_EHCI
|
||||
select S5P_GPIO_INT
|
||||
select S5P_SETUP_MIPIPHY
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_PWM
|
||||
help
|
||||
Machine support for Samsung Mobile NURI Board.
|
||||
|
||||
config MACH_ORIGEN
|
||||
bool "ORIGEN"
|
||||
select CPU_EXYNOS4210
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select EXYNOS4_DEV_USB_OHCI
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select S3C24XX_PWM
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_WDT
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
@ -342,14 +349,6 @@ config MACH_ORIGEN
|
||||
select S5P_DEV_USB_EHCI
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_PWM
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS4_DEV_USB_OHCI
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
select S3C24XX_PWM
|
||||
help
|
||||
Machine support for ORIGEN based on Samsung EXYNOS4210
|
||||
|
||||
@ -357,7 +356,17 @@ comment "EXYNOS4212 Boards"
|
||||
|
||||
config MACH_SMDK4212
|
||||
bool "SMDK4212"
|
||||
select SOC_EXYNOS4212
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
select EXYNOS4_SETUP_I2C3
|
||||
select EXYNOS4_SETUP_I2C7
|
||||
select EXYNOS4_SETUP_KEYPAD
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select S3C24XX_PWM
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_HSMMC3
|
||||
select S3C_DEV_I2C1
|
||||
@ -375,17 +384,7 @@ config MACH_SMDK4212
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select SAMSUNG_DEV_PWM
|
||||
select EXYNOS_DEV_SYSMMU
|
||||
select EXYNOS_DEV_DMA
|
||||
select EXYNOS_DEV_DRM
|
||||
select EXYNOS4_SETUP_FIMD0
|
||||
select EXYNOS4_SETUP_I2C1
|
||||
select EXYNOS4_SETUP_I2C3
|
||||
select EXYNOS4_SETUP_I2C7
|
||||
select EXYNOS4_SETUP_KEYPAD
|
||||
select EXYNOS4_SETUP_SDHCI
|
||||
select EXYNOS4_SETUP_USB_PHY
|
||||
select S3C24XX_PWM
|
||||
select SOC_EXYNOS4212
|
||||
help
|
||||
Machine support for Samsung SMDK4212
|
||||
|
||||
@ -393,8 +392,8 @@ comment "EXYNOS4412 Boards"
|
||||
|
||||
config MACH_SMDK4412
|
||||
bool "SMDK4412"
|
||||
select SOC_EXYNOS4412
|
||||
select MACH_SMDK4212
|
||||
select SOC_EXYNOS4412
|
||||
help
|
||||
Machine support for Samsung SMDK4412
|
||||
endif
|
||||
@ -404,12 +403,12 @@ comment "Flattened Device Tree based board for EXYNOS SoCs"
|
||||
config MACH_EXYNOS4_DT
|
||||
bool "Samsung Exynos4 Machine using device tree"
|
||||
depends on ARCH_EXYNOS4
|
||||
select CPU_EXYNOS4210
|
||||
select USE_OF
|
||||
select ARM_AMBA
|
||||
select CPU_EXYNOS4210
|
||||
select HAVE_SAMSUNG_KEYPAD if INPUT_KEYBOARD
|
||||
select PINCTRL
|
||||
select PINCTRL_EXYNOS4
|
||||
select USE_OF
|
||||
help
|
||||
Machine support for Samsung Exynos4 machine with device tree enabled.
|
||||
Select this if a fdt blob is available for the Exynos4 SoC based board.
|
||||
@ -419,9 +418,9 @@ config MACH_EXYNOS4_DT
|
||||
config MACH_EXYNOS5_DT
|
||||
bool "SAMSUNG EXYNOS5 Machine using device tree"
|
||||
depends on ARCH_EXYNOS5
|
||||
select ARM_AMBA
|
||||
select SOC_EXYNOS5250
|
||||
select USE_OF
|
||||
select ARM_AMBA
|
||||
help
|
||||
Machine support for Samsung EXYNOS5 machine with device tree enabled.
|
||||
Select this if a fdt blob is available for the EXYNOS5 SoC based board.
|
||||
|
||||
@ -91,7 +91,7 @@ config FOOTBRIDGE_ADDIN
|
||||
|
||||
# EBSA285 board in either host or addin mode
|
||||
config ARCH_EBSA285
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
bool
|
||||
select ARCH_MAY_HAVE_PC_FDC
|
||||
|
||||
endif
|
||||
|
||||
@ -12,9 +12,9 @@ config ARCH_H7201
|
||||
|
||||
config ARCH_H7202
|
||||
bool "hms30c7202"
|
||||
depends on ARCH_H720X
|
||||
select CPU_H7202
|
||||
select ZONE_DMA
|
||||
depends on ARCH_H720X
|
||||
help
|
||||
Say Y here if you are using the Hynix HMS30C7202 Reference Board
|
||||
|
||||
|
||||
@ -41,68 +41,68 @@ config SOC_IMX1
|
||||
|
||||
config SOC_IMX21
|
||||
bool
|
||||
select MACH_MX21
|
||||
select CPU_ARM926T
|
||||
select COMMON_CLK
|
||||
select CPU_ARM926T
|
||||
select IMX_HAVE_IOMUX_V1
|
||||
select MACH_MX21
|
||||
select MXC_AVIC
|
||||
|
||||
config SOC_IMX25
|
||||
bool
|
||||
select ARCH_MX25
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select COMMON_CLK
|
||||
select CPU_ARM926T
|
||||
select HAVE_CAN_FLEXCAN if CAN
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select MXC_AVIC
|
||||
|
||||
config SOC_IMX27
|
||||
bool
|
||||
select MACH_MX27
|
||||
select CPU_ARM926T
|
||||
select COMMON_CLK
|
||||
select CPU_ARM926T
|
||||
select IMX_HAVE_IOMUX_V1
|
||||
select MACH_MX27
|
||||
select MXC_AVIC
|
||||
|
||||
config SOC_IMX31
|
||||
bool
|
||||
select COMMON_CLK
|
||||
select CPU_V6
|
||||
select IMX_HAVE_PLATFORM_MXC_RNGA
|
||||
select MXC_AVIC
|
||||
select COMMON_CLK
|
||||
select SMP_ON_UP if SMP
|
||||
|
||||
config SOC_IMX35
|
||||
bool
|
||||
select CPU_V6K
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select COMMON_CLK
|
||||
select CPU_V6K
|
||||
select HAVE_CAN_FLEXCAN if CAN
|
||||
select HAVE_EPIT
|
||||
select MXC_AVIC
|
||||
select SMP_ON_UP if SMP
|
||||
select HAVE_CAN_FLEXCAN if CAN
|
||||
|
||||
config SOC_IMX5
|
||||
select CPU_V7
|
||||
select MXC_TZIC
|
||||
select COMMON_CLK
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
bool
|
||||
select ARCH_HAS_CPUFREQ
|
||||
select ARCH_MX5
|
||||
bool
|
||||
select ARCH_MXC_IOMUX_V3
|
||||
select COMMON_CLK
|
||||
select CPU_V7
|
||||
select MXC_TZIC
|
||||
|
||||
config SOC_IMX50
|
||||
bool
|
||||
select SOC_IMX5
|
||||
select ARCH_MX50
|
||||
select SOC_IMX5
|
||||
|
||||
config SOC_IMX51
|
||||
bool
|
||||
select SOC_IMX5
|
||||
select ARCH_MX5
|
||||
select ARCH_MX51
|
||||
select PINCTRL
|
||||
select PINCTRL_IMX51
|
||||
select SOC_IMX5
|
||||
|
||||
if ARCH_IMX_V4_V5
|
||||
|
||||
@ -112,10 +112,10 @@ config MACH_MXLADS
|
||||
|
||||
config ARCH_MX1ADS
|
||||
bool "MX1ADS platform"
|
||||
select MACH_MXLADS
|
||||
select SOC_IMX1
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select MACH_MXLADS
|
||||
select SOC_IMX1
|
||||
help
|
||||
Say Y here if you are using Motorola MX1ADS/MXLADS boards
|
||||
|
||||
@ -127,9 +127,9 @@ config MACH_SCB9328
|
||||
|
||||
config MACH_APF9328
|
||||
bool "APF9328"
|
||||
select SOC_IMX1
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select SOC_IMX1
|
||||
help
|
||||
Say Yes here if you are using the Armadeus APF9328 development board
|
||||
|
||||
@ -137,11 +137,11 @@ comment "MX21 platforms:"
|
||||
|
||||
config MACH_MX21ADS
|
||||
bool "MX21ADS platform"
|
||||
select SOC_IMX21
|
||||
select IMX_HAVE_PLATFORM_IMX_FB
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select SOC_IMX21
|
||||
help
|
||||
Include support for MX21ADS platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
@ -150,22 +150,21 @@ comment "MX25 platforms:"
|
||||
|
||||
config MACH_MX25_3DS
|
||||
bool "Support MX25PDK (3DS) Platform"
|
||||
select SOC_IMX25
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMXDI_RTC
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_FB
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_KEYPAD
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select SOC_IMX25
|
||||
|
||||
config MACH_EUKREA_CPUIMX25SD
|
||||
bool "Support Eukrea CPUIMX25 Platform"
|
||||
select SOC_IMX25
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
@ -177,6 +176,7 @@ config MACH_EUKREA_CPUIMX25SD
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX25
|
||||
|
||||
choice
|
||||
prompt "Baseboard"
|
||||
@ -199,20 +199,19 @@ comment "MX27 platforms:"
|
||||
|
||||
config MACH_MX27ADS
|
||||
bool "MX27ADS platform"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_IMX_FB
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_W1
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for MX27ADS platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_PCM038
|
||||
bool "Phytec phyCORE-i.MX27 CPU module (pcm038)"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
@ -221,6 +220,7 @@ config MACH_PCM038
|
||||
select IMX_HAVE_PLATFORM_MXC_W1
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for phyCORE-i.MX27 (aka pcm038) platform. This
|
||||
includes specific configurations for the module and its peripherals.
|
||||
@ -242,7 +242,6 @@ endchoice
|
||||
|
||||
config MACH_CPUIMX27
|
||||
bool "Eukrea CPUIMX27 module"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
@ -251,6 +250,7 @@ config MACH_CPUIMX27
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_W1
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for Eukrea CPUIMX27 platform. This includes
|
||||
specific configurations for the module and its peripherals.
|
||||
@ -292,7 +292,6 @@ endchoice
|
||||
|
||||
config MACH_MX27_3DS
|
||||
bool "MX27PDK platform"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_FB
|
||||
@ -306,13 +305,13 @@ config MACH_MX27_3DS
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_DEBUG_BOARD
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for MX27PDK platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_IMX27_VISSTRIM_M10
|
||||
bool "Vista Silicon i.MX27 Visstrim_m10"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
@ -321,6 +320,7 @@ config MACH_IMX27_VISSTRIM_M10
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select LEDS_GPIO_REGISTER
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for Visstrim_m10 platform and its different variants.
|
||||
This includes specific configurations for the board and its
|
||||
@ -328,16 +328,15 @@ config MACH_IMX27_VISSTRIM_M10
|
||||
|
||||
config MACH_IMX27LITE
|
||||
bool "LogicPD MX27 LITEKIT platform"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for MX27 LITEKIT platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_PCA100
|
||||
bool "Phytec phyCARD-s (pca100)"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_FB
|
||||
@ -350,27 +349,28 @@ config MACH_PCA100
|
||||
select IMX_HAVE_PLATFORM_MXC_W1
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for phyCARD-s (aka pca100) platform. This
|
||||
includes specific configurations for the module and its peripherals.
|
||||
|
||||
config MACH_MXT_TD60
|
||||
bool "Maxtrack i-MXT TD60"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_IMX_FB
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for i-MXT (aka td60) platform. This
|
||||
includes specific configurations for the module and its peripherals.
|
||||
|
||||
config MACH_IMX27IPCAM
|
||||
bool "IMX27 IPCAM platform"
|
||||
select SOC_IMX27
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select SOC_IMX27
|
||||
help
|
||||
Include support for IMX27 IPCAM platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
@ -390,11 +390,11 @@ comment "MX31 platforms:"
|
||||
|
||||
config MACH_MX31ADS
|
||||
bool "Support MX31ADS platforms"
|
||||
select SOC_IMX31
|
||||
default y
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_SSI
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
default y
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for MX31ADS platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
@ -412,21 +412,19 @@ config MACH_MX31ADS_WM1133_EV1
|
||||
|
||||
config MACH_MX31LILLY
|
||||
bool "Support MX31 LILLY-1131 platforms (INCO startec)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for mx31 based LILLY1131 modules. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX31LITE
|
||||
bool "Support MX31 LITEKIT (LogicPD)"
|
||||
select SOC_IMX31
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
@ -435,13 +433,14 @@ config MACH_MX31LITE
|
||||
select IMX_HAVE_PLATFORM_MXC_RTC
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for MX31 LITEKIT platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_PCM037
|
||||
bool "Support Phytec pcm037 (i.MX31) platforms"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
@ -452,6 +451,7 @@ config MACH_PCM037
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_W1
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for Phytec pcm037 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
@ -468,8 +468,6 @@ config MACH_PCM037_EET
|
||||
|
||||
config MACH_MX31_3DS
|
||||
bool "Support MX31PDK (3DS)"
|
||||
select SOC_IMX31
|
||||
select MXC_DEBUG_BOARD
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
@ -481,7 +479,9 @@ config MACH_MX31_3DS
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_DEBUG_BOARD
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for MX31PDK (3DS) platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
@ -497,7 +497,6 @@ config MACH_MX31_3DS_MXC_NAND_USE_BBT
|
||||
|
||||
config MACH_MX31MOBOARD
|
||||
bool "Support mx31moboard platforms (EPFL Mobots group)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
@ -509,22 +508,22 @@ config MACH_MX31MOBOARD
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select LEDS_GPIO_REGISTER
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for mx31moboard platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_QONG
|
||||
bool "Support Dave/DENX QongEVB-LITE platform"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for Dave/DENX QongEVB-LITE platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_ARMADILLO5X0
|
||||
bool "Support Atmark Armadillo-500 Development Base Board"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
@ -533,23 +532,24 @@ config MACH_ARMADILLO5X0
|
||||
select IMX_HAVE_PLATFORM_MXC_MMC
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for Atmark Armadillo-500 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_KZM_ARM11_01
|
||||
bool "Support KZM-ARM11-01(Kyoto Microcomputer)"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for KZM-ARM11-01. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_BUG
|
||||
bool "Support Buglabs BUGBase platform"
|
||||
select SOC_IMX31
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
default y
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select SOC_IMX31
|
||||
help
|
||||
Include support for BUGBase 1.3 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
@ -565,7 +565,6 @@ comment "MX35 platforms:"
|
||||
|
||||
config MACH_PCM043
|
||||
bool "Support Phytec pcm043 (i.MX35) platforms"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
@ -577,14 +576,13 @@ config MACH_PCM043
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX35
|
||||
help
|
||||
Include support for Phytec pcm043 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
|
||||
config MACH_MX35_3DS
|
||||
bool "Support MX35PDK platform"
|
||||
select SOC_IMX35
|
||||
select MXC_DEBUG_BOARD
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_FB
|
||||
@ -595,13 +593,14 @@ config MACH_MX35_3DS
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_MXC_RTC
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_DEBUG_BOARD
|
||||
select SOC_IMX35
|
||||
help
|
||||
Include support for MX35PDK platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_EUKREA_CPUIMX35SD
|
||||
bool "Support Eukrea CPUIMX35 Platform"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
@ -611,6 +610,7 @@ config MACH_EUKREA_CPUIMX35SD
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select MXC_ULPI if USB_ULPI
|
||||
select SOC_IMX35
|
||||
help
|
||||
Include support for Eukrea CPUIMX35 platform. This includes
|
||||
specific configurations for the board and its peripherals.
|
||||
@ -635,16 +635,16 @@ endchoice
|
||||
|
||||
config MACH_VPR200
|
||||
bool "Support VPR200 platform"
|
||||
select SOC_IMX35
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_GPIO_KEYS
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IPU_CORE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select SOC_IMX35
|
||||
help
|
||||
Include support for VPR200 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
@ -654,11 +654,11 @@ comment "i.MX5 platforms:"
|
||||
config MACH_MX50_RDP
|
||||
bool "Support MX50 reference design platform"
|
||||
depends on BROKEN
|
||||
select SOC_IMX50
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select SOC_IMX50
|
||||
help
|
||||
Include support for MX50 reference design platform (RDP) board. This
|
||||
includes specific configurations for the board and its peripherals.
|
||||
@ -667,15 +667,14 @@ comment "i.MX51 machines:"
|
||||
|
||||
config MACH_IMX51_DT
|
||||
bool "Support i.MX51 platforms from device tree"
|
||||
select SOC_IMX51
|
||||
select MACH_MX51_BABBAGE
|
||||
select SOC_IMX51
|
||||
help
|
||||
Include support for Freescale i.MX51 based platforms
|
||||
using the device tree for discovery
|
||||
|
||||
config MACH_MX51_BABBAGE
|
||||
bool "Support MX51 BABBAGE platforms"
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
@ -683,6 +682,7 @@ config MACH_MX51_BABBAGE
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select SOC_IMX51
|
||||
help
|
||||
Include support for MX51 Babbage platform, also known as MX51EVK in
|
||||
u-boot. This includes specific configurations for the board and its
|
||||
@ -690,27 +690,27 @@ config MACH_MX51_BABBAGE
|
||||
|
||||
config MACH_MX51_3DS
|
||||
bool "Support MX51PDK (3DS)"
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_KEYPAD
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select MXC_DEBUG_BOARD
|
||||
select SOC_IMX51
|
||||
help
|
||||
Include support for MX51PDK (3DS) platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
config MACH_EUKREA_CPUIMX51SD
|
||||
bool "Support Eukrea CPUIMX51SD module"
|
||||
select SOC_IMX51
|
||||
select IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_IMX_I2C
|
||||
select IMX_HAVE_PLATFORM_IMX_UART
|
||||
select IMX_HAVE_PLATFORM_IMX2_WDT
|
||||
select IMX_HAVE_PLATFORM_MXC_EHCI
|
||||
select IMX_HAVE_PLATFORM_MXC_NAND
|
||||
select IMX_HAVE_PLATFORM_SPI_IMX
|
||||
select SOC_IMX51
|
||||
help
|
||||
Include support for Eukrea CPUIMX51SD platform. This includes
|
||||
specific configurations for the module and its peripherals.
|
||||
@ -736,12 +736,12 @@ comment "Device tree only"
|
||||
|
||||
config SOC_IMX53
|
||||
bool "i.MX53 support"
|
||||
select SOC_IMX5
|
||||
select ARCH_MX5
|
||||
select ARCH_MX53
|
||||
select HAVE_CAN_FLEXCAN if CAN
|
||||
select PINCTRL
|
||||
select PINCTRL_IMX53
|
||||
select SOC_IMX5
|
||||
|
||||
help
|
||||
This enables support for Freescale i.MX53 processor.
|
||||
|
||||
@ -234,8 +234,8 @@ config IXP4XX_QMGR
|
||||
|
||||
config IXP4XX_NPE
|
||||
tristate "IXP4xx Network Processor Engine support"
|
||||
select HOTPLUG
|
||||
select FW_LOADER
|
||||
select HOTPLUG
|
||||
help
|
||||
This driver supports IXP4xx built-in network coprocessors
|
||||
and is automatically selected by Ethernet and HSS drivers.
|
||||
|
||||
@ -107,22 +107,22 @@ endmenu
|
||||
|
||||
config CPU_PXA168
|
||||
bool
|
||||
select CPU_MOHAWK
|
||||
select COMMON_CLK
|
||||
select CPU_MOHAWK
|
||||
help
|
||||
Select code specific to PXA168
|
||||
|
||||
config CPU_PXA910
|
||||
bool
|
||||
select CPU_MOHAWK
|
||||
select COMMON_CLK
|
||||
select CPU_MOHAWK
|
||||
help
|
||||
Select code specific to PXA910
|
||||
|
||||
config CPU_MMP2
|
||||
bool
|
||||
select CPU_PJ4
|
||||
select COMMON_CLK
|
||||
select CPU_PJ4
|
||||
help
|
||||
Select code specific to MMP2. MMP2 is ARMv7 compatible.
|
||||
|
||||
|
||||
@ -10,35 +10,35 @@ choice
|
||||
|
||||
config ARCH_MSM7X00A
|
||||
bool "MSM7x00A / MSM7x01A"
|
||||
select MACH_TROUT if !MACH_HALIBUT
|
||||
select ARCH_MSM_ARM11
|
||||
select MSM_SMD
|
||||
select MSM_SMD_PKG3
|
||||
select CPU_V6
|
||||
select GPIO_MSM_V1
|
||||
select MACH_TROUT if !MACH_HALIBUT
|
||||
select MSM_PROC_COMM
|
||||
select MSM_SMD
|
||||
select MSM_SMD_PKG3
|
||||
|
||||
config ARCH_MSM7X30
|
||||
bool "MSM7x30"
|
||||
select MACH_MSM7X30_SURF # if !
|
||||
select ARCH_MSM_SCORPION
|
||||
select CPU_V7
|
||||
select GPIO_MSM_V1
|
||||
select MACH_MSM7X30_SURF # if !
|
||||
select MSM_GPIOMUX
|
||||
select MSM_PROC_COMM
|
||||
select MSM_SMD
|
||||
select MSM_VIC
|
||||
select CPU_V7
|
||||
select MSM_GPIOMUX
|
||||
select GPIO_MSM_V1
|
||||
select MSM_PROC_COMM
|
||||
|
||||
config ARCH_QSD8X50
|
||||
bool "QSD8X50"
|
||||
select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5
|
||||
select ARCH_MSM_SCORPION
|
||||
select CPU_V7
|
||||
select GPIO_MSM_V1
|
||||
select MACH_QSD8X50_SURF if !MACH_QSD8X50A_ST1_5
|
||||
select MSM_GPIOMUX
|
||||
select MSM_PROC_COMM
|
||||
select MSM_SMD
|
||||
select MSM_VIC
|
||||
select CPU_V7
|
||||
select MSM_GPIOMUX
|
||||
select GPIO_MSM_V1
|
||||
select MSM_PROC_COMM
|
||||
|
||||
endchoice
|
||||
|
||||
@ -47,10 +47,10 @@ config ARCH_MSM8X60
|
||||
select ARCH_MSM_SCORPIONMP
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select MSM_V2_TLMM
|
||||
select GPIO_MSM_V2
|
||||
select MSM_GPIOMUX
|
||||
select MSM_SCM if SMP
|
||||
select MSM_V2_TLMM
|
||||
select USE_OF
|
||||
|
||||
config ARCH_MSM8960
|
||||
@ -58,9 +58,9 @@ config ARCH_MSM8960
|
||||
select ARCH_MSM_SCORPIONMP
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select MSM_V2_TLMM
|
||||
select MSM_GPIOMUX
|
||||
select MSM_SCM if SMP
|
||||
select MSM_V2_TLMM
|
||||
select USE_OF
|
||||
|
||||
config MSM_HAS_DEBUG_UART_HS
|
||||
@ -110,8 +110,8 @@ config MACH_QSD8X50_SURF
|
||||
|
||||
config MACH_QSD8X50A_ST1_5
|
||||
depends on ARCH_QSD8X50
|
||||
select MSM_SOC_REV_A
|
||||
bool "QSD8x50A ST1.5"
|
||||
select MSM_SOC_REV_A
|
||||
help
|
||||
Support for the Qualcomm ST1.5.
|
||||
|
||||
|
||||
@ -4,8 +4,8 @@ menu "Nomadik boards"
|
||||
|
||||
config MACH_NOMADIK_8815NHK
|
||||
bool "ST 8815 Nomadik Hardware Kit (evaluation board)"
|
||||
select NOMADIK_8815
|
||||
select HAS_MTU
|
||||
select NOMADIK_8815
|
||||
|
||||
endmenu
|
||||
|
||||
@ -16,7 +16,7 @@ config I2C_BITBANG_8815NHK
|
||||
tristate "Driver for bit-bang busses found on the 8815 NHK"
|
||||
depends on I2C && MACH_NOMADIK_8815NHK
|
||||
depends on PINCTRL_NOMADIK
|
||||
select I2C_ALGOBIT
|
||||
default y
|
||||
select I2C_ALGOBIT
|
||||
|
||||
endif
|
||||
|
||||
@ -8,15 +8,15 @@ comment "OMAP Core Type"
|
||||
config ARCH_OMAP730
|
||||
depends on ARCH_OMAP1
|
||||
bool "OMAP730 Based System"
|
||||
select ARCH_OMAP_OTG
|
||||
select CPU_ARM926T
|
||||
select OMAP_MPU_TIMER
|
||||
select ARCH_OMAP_OTG
|
||||
|
||||
config ARCH_OMAP850
|
||||
depends on ARCH_OMAP1
|
||||
bool "OMAP850 Based System"
|
||||
select CPU_ARM926T
|
||||
select ARCH_OMAP_OTG
|
||||
select CPU_ARM926T
|
||||
|
||||
config ARCH_OMAP15XX
|
||||
depends on ARCH_OMAP1
|
||||
@ -28,8 +28,8 @@ config ARCH_OMAP15XX
|
||||
config ARCH_OMAP16XX
|
||||
depends on ARCH_OMAP1
|
||||
bool "OMAP16xx Based System"
|
||||
select CPU_ARM926T
|
||||
select ARCH_OMAP_OTG
|
||||
select CPU_ARM926T
|
||||
|
||||
comment "OMAP Board Type"
|
||||
depends on ARCH_OMAP1
|
||||
@ -132,8 +132,8 @@ config MACH_OMAP_PALMTT
|
||||
|
||||
config MACH_SX1
|
||||
bool "Siemens SX1"
|
||||
select I2C
|
||||
depends on ARCH_OMAP1 && ARCH_OMAP15XX
|
||||
select I2C
|
||||
help
|
||||
Support for the Siemens SX1 phone. To boot the kernel,
|
||||
you'll need a SX1 compatible bootloader; check out
|
||||
|
||||
@ -6,19 +6,19 @@ config ARCH_OMAP2PLUS_TYPICAL
|
||||
bool "Typical OMAP configuration"
|
||||
default y
|
||||
select AEABI
|
||||
select REGULATOR
|
||||
select PM_RUNTIME
|
||||
select VFP
|
||||
select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
|
||||
select SERIAL_OMAP
|
||||
select SERIAL_OMAP_CONSOLE
|
||||
select HIGHMEM
|
||||
select I2C
|
||||
select I2C_OMAP
|
||||
select MENELAUS if ARCH_OMAP2
|
||||
select NEON if ARCH_OMAP3 || ARCH_OMAP4 || SOC_OMAP5
|
||||
select PINCTRL
|
||||
select PM_RUNTIME
|
||||
select REGULATOR
|
||||
select SERIAL_OMAP
|
||||
select SERIAL_OMAP_CONSOLE
|
||||
select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
|
||||
select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
|
||||
select HIGHMEM
|
||||
select PINCTRL
|
||||
select VFP
|
||||
help
|
||||
Compile a kernel suitable for booting most boards
|
||||
|
||||
@ -40,44 +40,44 @@ config ARCH_OMAP3
|
||||
bool "TI OMAP3"
|
||||
depends on ARCH_OMAP2PLUS
|
||||
default y
|
||||
select CPU_V7
|
||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||
select ARCH_HAS_OPP
|
||||
select PM_RUNTIME if CPU_IDLE
|
||||
select PM_OPP if PM
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select CPU_V7
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SOC_HAS_OMAP2_SDRC
|
||||
select OMAP_INTERCONNECT
|
||||
select PM_OPP if PM
|
||||
select PM_RUNTIME if CPU_IDLE
|
||||
select SOC_HAS_OMAP2_SDRC
|
||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||
|
||||
config ARCH_OMAP4
|
||||
bool "TI OMAP4"
|
||||
default y
|
||||
depends on ARCH_OMAP2PLUS
|
||||
select ARCH_HAS_OPP
|
||||
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_GIC
|
||||
select CACHE_L2X0
|
||||
select CPU_V7
|
||||
select ARM_GIC
|
||||
select HAVE_SMP
|
||||
select LOCAL_TIMERS if SMP
|
||||
select OMAP_INTERCONNECT
|
||||
select PL310_ERRATA_588369
|
||||
select PL310_ERRATA_727915
|
||||
select ARM_ERRATA_720789
|
||||
select ARCH_HAS_OPP
|
||||
select PM_RUNTIME if CPU_IDLE
|
||||
select PM_OPP if PM
|
||||
select PM_RUNTIME if CPU_IDLE
|
||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
|
||||
select OMAP_INTERCONNECT
|
||||
|
||||
config SOC_OMAP5
|
||||
bool "TI OMAP5"
|
||||
select CPU_V7
|
||||
select ARM_GIC
|
||||
select HAVE_SMP
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select SOC_HAS_REALTIME_COUNTER
|
||||
select ARM_ARCH_TIMER
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select HAVE_SMP
|
||||
select SOC_HAS_REALTIME_COUNTER
|
||||
|
||||
comment "OMAP Core Type"
|
||||
depends on ARCH_OMAP2
|
||||
@ -109,8 +109,8 @@ config SOC_TI81XX
|
||||
config SOC_AM33XX
|
||||
bool "AM33XX support"
|
||||
default y
|
||||
select CPU_V7
|
||||
select ARM_CPU_SUSPEND if PM
|
||||
select CPU_V7
|
||||
select MULTI_IRQ_HANDLER
|
||||
|
||||
config OMAP_PACKAGE_ZAF
|
||||
@ -157,8 +157,8 @@ config MACH_OMAP_H4
|
||||
bool "OMAP 2420 H4 board"
|
||||
depends on SOC_OMAP2420
|
||||
default y
|
||||
select OMAP_PACKAGE_ZAF
|
||||
select OMAP_DEBUG_DEVICES
|
||||
select OMAP_PACKAGE_ZAF
|
||||
|
||||
config MACH_OMAP_APOLLON
|
||||
bool "OMAP 2420 Apollon board"
|
||||
@ -193,8 +193,8 @@ config MACH_OMAP_LDP
|
||||
config MACH_OMAP3530_LV_SOM
|
||||
bool "OMAP3 Logic 3530 LV SOM board"
|
||||
depends on ARCH_OMAP3
|
||||
select OMAP_PACKAGE_CBB
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
help
|
||||
Support for the LogicPD OMAP3530 SOM Development kit
|
||||
for full description please see the products webpage at
|
||||
@ -203,8 +203,8 @@ config MACH_OMAP3530_LV_SOM
|
||||
config MACH_OMAP3_TORPEDO
|
||||
bool "OMAP3 Logic 35x Torpedo board"
|
||||
depends on ARCH_OMAP3
|
||||
select OMAP_PACKAGE_CBB
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
help
|
||||
Support for the LogicPD OMAP35x Torpedo Development kit
|
||||
for full description please see the products webpage at
|
||||
@ -265,17 +265,17 @@ config MACH_NOKIA_N8X0
|
||||
bool "Nokia N800/N810"
|
||||
depends on SOC_OMAP2420
|
||||
default y
|
||||
select OMAP_PACKAGE_ZAC
|
||||
select MACH_NOKIA_N800
|
||||
select MACH_NOKIA_N810
|
||||
select MACH_NOKIA_N810_WIMAX
|
||||
select OMAP_PACKAGE_ZAC
|
||||
|
||||
config MACH_NOKIA_RM680
|
||||
bool "Nokia RM-680/696 board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select MACH_NOKIA_RM696
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_NOKIA_RX51
|
||||
bool "Nokia RX-51 board"
|
||||
@ -288,20 +288,20 @@ config MACH_OMAP_ZOOM2
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select SERIAL_8250
|
||||
select SERIAL_CORE_CONSOLE
|
||||
select SERIAL_8250_CONSOLE
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SERIAL_8250
|
||||
select SERIAL_8250_CONSOLE
|
||||
select SERIAL_CORE_CONSOLE
|
||||
|
||||
config MACH_OMAP_ZOOM3
|
||||
bool "OMAP3630 Zoom3 board"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBP
|
||||
select SERIAL_8250
|
||||
select SERIAL_CORE_CONSOLE
|
||||
select SERIAL_8250_CONSOLE
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SERIAL_8250
|
||||
select SERIAL_8250_CONSOLE
|
||||
select SERIAL_CORE_CONSOLE
|
||||
|
||||
config MACH_CM_T35
|
||||
bool "CompuLab CM-T35/CM-T3730 modules"
|
||||
@ -329,8 +329,8 @@ config MACH_IGEP0030
|
||||
bool "IGEP OMAP3 module"
|
||||
depends on ARCH_OMAP3
|
||||
default y
|
||||
select OMAP_PACKAGE_CBB
|
||||
select MACH_IGEP0020
|
||||
select OMAP_PACKAGE_CBB
|
||||
|
||||
config MACH_SBC3530
|
||||
bool "OMAP3 SBC STALKER board"
|
||||
|
||||
@ -6,8 +6,8 @@ config ARCH_PRIMA2
|
||||
bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
|
||||
default y
|
||||
select CPU_V7
|
||||
select ZONE_DMA
|
||||
select SIRF_IRQ
|
||||
select ZONE_DMA
|
||||
help
|
||||
Support for CSR SiRFSoC ARM Cortex A9 Platform
|
||||
|
||||
|
||||
@ -27,10 +27,10 @@ comment "Intel/Marvell Dev Platforms (sorted by hardware release time)"
|
||||
|
||||
config MACH_PXA3XX_DT
|
||||
bool "Support PXA3xx platforms from device tree"
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
select POWER_SUPPLY
|
||||
select HAVE_PWM
|
||||
select POWER_SUPPLY
|
||||
select PXA3xx
|
||||
select USE_OF
|
||||
help
|
||||
Include support for Marvell PXA3xx based platforms using
|
||||
@ -44,13 +44,13 @@ config ARCH_LUBBOCK
|
||||
|
||||
config MACH_MAINSTONE
|
||||
bool "Intel HCDDBBVA0 Development Platform (aka Mainstone)"
|
||||
select PXA27x
|
||||
select HAVE_PWM
|
||||
select PXA27x
|
||||
|
||||
config MACH_ZYLONITE
|
||||
bool
|
||||
select PXA3xx
|
||||
select HAVE_PWM
|
||||
select PXA3xx
|
||||
|
||||
config MACH_ZYLONITE300
|
||||
bool "PXA3xx Development Platform (aka Zylonite) PXA300/310"
|
||||
@ -65,19 +65,19 @@ config MACH_ZYLONITE320
|
||||
|
||||
config MACH_LITTLETON
|
||||
bool "PXA3xx Form Factor Platform (aka Littleton)"
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
select CPU_PXA310
|
||||
select PXA3xx
|
||||
|
||||
config MACH_TAVOREVB
|
||||
bool "PXA930 Evaluation Board (aka TavorEVB)"
|
||||
select PXA3xx
|
||||
select CPU_PXA930
|
||||
select PXA3xx
|
||||
|
||||
config MACH_SAAR
|
||||
bool "PXA930 Handheld Platform (aka SAAR)"
|
||||
select PXA3xx
|
||||
select CPU_PXA930
|
||||
select PXA3xx
|
||||
|
||||
comment "Third Party Dev Platforms (sorted by vendor name)"
|
||||
|
||||
@ -87,29 +87,29 @@ config ARCH_PXA_IDP
|
||||
|
||||
config ARCH_VIPER
|
||||
bool "Arcom/Eurotech VIPER SBC"
|
||||
select PXA25x
|
||||
select ISA
|
||||
select I2C_GPIO
|
||||
select HAVE_PWM
|
||||
select PXA_HAVE_ISA_IRQS
|
||||
select ARCOM_PCMCIA
|
||||
select HAVE_PWM
|
||||
select I2C_GPIO
|
||||
select ISA
|
||||
select PXA25x
|
||||
select PXA_HAVE_ISA_IRQS
|
||||
|
||||
config MACH_ARCOM_ZEUS
|
||||
bool "Arcom/Eurotech ZEUS SBC"
|
||||
select PXA27x
|
||||
select ISA
|
||||
select PXA_HAVE_ISA_IRQS
|
||||
select ARCOM_PCMCIA
|
||||
select ISA
|
||||
select PXA27x
|
||||
select PXA_HAVE_ISA_IRQS
|
||||
|
||||
config MACH_BALLOON3
|
||||
bool "Balloon 3 board"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
|
||||
config MACH_CSB726
|
||||
bool "Enable Cogent CSB726 System On a Module"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a Cogent
|
||||
CSB726 System On Module.
|
||||
@ -121,11 +121,11 @@ config CSB726_CSB701
|
||||
config MACH_ARMCORE
|
||||
bool "CompuLab CM-X255/CM-X270 modules"
|
||||
select ARCH_HAS_DMA_SET_COHERENT_MASK if PCI
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select PXA25x
|
||||
select MIGHT_HAVE_PCI
|
||||
select NEED_MACH_IO_H if PCI
|
||||
select PXA25x
|
||||
select PXA27x
|
||||
|
||||
config MACH_EM_X270
|
||||
bool "CompuLab EM-x270 platform"
|
||||
@ -137,10 +137,10 @@ config MACH_EXEDA
|
||||
|
||||
config MACH_CM_X300
|
||||
bool "CompuLab CM-X300 modules"
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
select CPU_PXA310
|
||||
select HAVE_PWM
|
||||
select PXA3xx
|
||||
|
||||
config MACH_CAPC7117
|
||||
bool "Embedian CAPC-7117 evaluation kit based on the MXM-8x10 CoM"
|
||||
@ -168,22 +168,22 @@ endchoice
|
||||
|
||||
config MACH_INTELMOTE2
|
||||
bool "Intel Mote 2 Platform"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
|
||||
config MACH_STARGATE2
|
||||
bool "Intel Stargate 2 Platform"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
|
||||
config MACH_XCEP
|
||||
bool "Iskratel Electronics XCEP"
|
||||
select PXA25x
|
||||
select MTD
|
||||
select MTD_PHYSMAP
|
||||
select MTD_CFI_INTELEXT
|
||||
select MTD_CFI
|
||||
select MTD_CFI_INTELEXT
|
||||
select MTD_CHAR
|
||||
select MTD_PHYSMAP
|
||||
select PXA25x
|
||||
select SMC91X
|
||||
help
|
||||
PXA255 based Single Board Computer with SMC 91C111 ethernet chip and 64 MB of flash.
|
||||
@ -195,14 +195,14 @@ config TRIZEPS_PXA
|
||||
config MACH_TRIZEPS4
|
||||
bool "Keith und Koep Trizeps4 DIMM-Module"
|
||||
depends on TRIZEPS_PXA
|
||||
select TRIZEPS_PCMCIA
|
||||
select PXA27x
|
||||
select TRIZEPS_PCMCIA
|
||||
|
||||
config MACH_TRIZEPS4WL
|
||||
bool "Keith und Koep Trizeps4-WL DIMM-Module"
|
||||
depends on TRIZEPS_PXA
|
||||
select TRIZEPS_PCMCIA
|
||||
select PXA27x
|
||||
select TRIZEPS_PCMCIA
|
||||
|
||||
choice
|
||||
prompt "Select base board for Trizeps module"
|
||||
@ -231,18 +231,18 @@ config TRIZEPS_PCMCIA
|
||||
|
||||
config MACH_LOGICPD_PXA270
|
||||
bool "LogicPD PXA270 Card Engine Development Platform"
|
||||
select PXA27x
|
||||
select HAVE_PWM
|
||||
select PXA27x
|
||||
|
||||
config MACH_PCM027
|
||||
bool "Phytec phyCORE-PXA270 CPU module (PCM-027)"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
|
||||
config MACH_PCM990_BASEBOARD
|
||||
bool "PHYTEC PCM-990 development board"
|
||||
select HAVE_PWM
|
||||
depends on MACH_PCM027
|
||||
select HAVE_PWM
|
||||
|
||||
choice
|
||||
prompt "display on pcm990"
|
||||
@ -266,19 +266,19 @@ config MACH_COLIBRI
|
||||
config MACH_COLIBRI_PXA270_INCOME
|
||||
bool "Income s.r.o. PXA270 SBC"
|
||||
depends on MACH_COLIBRI
|
||||
select PXA27x
|
||||
select HAVE_PWM
|
||||
select PXA27x
|
||||
|
||||
config MACH_COLIBRI300
|
||||
bool "Toradex Colibri PXA300/310"
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
select CPU_PXA310
|
||||
select PXA3xx
|
||||
|
||||
config MACH_COLIBRI320
|
||||
bool "Toradex Colibri PXA320"
|
||||
select PXA3xx
|
||||
select CPU_PXA320
|
||||
select PXA3xx
|
||||
|
||||
config MACH_COLIBRI_EVALBOARD
|
||||
bool "Toradex Colibri Evaluation Carrier Board support"
|
||||
@ -286,8 +286,8 @@ config MACH_COLIBRI_EVALBOARD
|
||||
|
||||
config MACH_VPAC270
|
||||
bool "Voipac PXA270"
|
||||
select PXA27x
|
||||
select HAVE_PATA_PLATFORM
|
||||
select PXA27x
|
||||
help
|
||||
PXA270 based Single Board Computer.
|
||||
|
||||
@ -295,9 +295,9 @@ comment "End-user Products (sorted by vendor name)"
|
||||
|
||||
config MACH_H4700
|
||||
bool "HP iPAQ hx4700"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select HAVE_PWM
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
|
||||
config MACH_H5000
|
||||
bool "HP iPAQ h5000"
|
||||
@ -309,16 +309,16 @@ config MACH_HIMALAYA
|
||||
|
||||
config MACH_MAGICIAN
|
||||
bool "Enable HTC Magician Support"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select HAVE_PWM
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
|
||||
config MACH_MIOA701
|
||||
bool "Mitac Mio A701 Support"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select HAVE_PWM
|
||||
select GPIO_SYSFS
|
||||
select HAVE_PWM
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a
|
||||
MIO A701. Currently there is only basic support
|
||||
@ -326,9 +326,9 @@ config MACH_MIOA701
|
||||
|
||||
config PXA_EZX
|
||||
bool "Motorola EZX Platform"
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select HAVE_PWM
|
||||
select IWMMXT
|
||||
select PXA27x
|
||||
|
||||
config MACH_EZX_A780
|
||||
bool "Motorola EZX A780"
|
||||
@ -393,9 +393,9 @@ config MACH_PALMT5
|
||||
bool "Palm Tungsten|T5"
|
||||
default y
|
||||
depends on ARCH_PXA_PALM
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select MACH_PALM27X
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a Palm Tungsten|T5
|
||||
handheld computer.
|
||||
@ -404,9 +404,9 @@ config MACH_PALMTX
|
||||
bool "Palm T|X"
|
||||
default y
|
||||
depends on ARCH_PXA_PALM
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select MACH_PALM27X
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a Palm T|X
|
||||
handheld computer.
|
||||
@ -415,9 +415,9 @@ config MACH_PALMZ72
|
||||
bool "Palm Zire 72"
|
||||
default y
|
||||
depends on ARCH_PXA_PALM
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select MACH_PALM27X
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on Palm Zire 72
|
||||
handheld computer.
|
||||
@ -426,9 +426,9 @@ config MACH_PALMLD
|
||||
bool "Palm LifeDrive"
|
||||
default y
|
||||
depends on ARCH_PXA_PALM
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select MACH_PALM27X
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a Palm LifeDrive
|
||||
handheld computer.
|
||||
@ -441,10 +441,10 @@ config MACH_CENTRO
|
||||
bool "Palm Centro 685 (GSM)"
|
||||
default y
|
||||
depends on ARCH_PXA_PALM
|
||||
select MACH_PALM27X
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select MACH_PALM27X
|
||||
select PALM_TREO
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on Palm Centro 685 (GSM)
|
||||
smartphone.
|
||||
@ -453,37 +453,37 @@ config MACH_TREO680
|
||||
bool "Palm Treo 680"
|
||||
default y
|
||||
depends on ARCH_PXA_PALM
|
||||
select MACH_PALM27X
|
||||
select PXA27x
|
||||
select IWMMXT
|
||||
select MACH_PALM27X
|
||||
select PALM_TREO
|
||||
select PXA27x
|
||||
help
|
||||
Say Y here if you intend to run this kernel on Palm Treo 680
|
||||
smartphone.
|
||||
|
||||
config MACH_RAUMFELD_RC
|
||||
bool "Raumfeld Controller"
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
select POWER_SUPPLY
|
||||
select HAVE_PWM
|
||||
select POWER_SUPPLY
|
||||
select PXA3xx
|
||||
|
||||
config MACH_RAUMFELD_CONNECTOR
|
||||
bool "Raumfeld Connector"
|
||||
select CPU_PXA300
|
||||
select POWER_SUPPLY
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
|
||||
config MACH_RAUMFELD_SPEAKER
|
||||
bool "Raumfeld Speaker"
|
||||
select CPU_PXA300
|
||||
select POWER_SUPPLY
|
||||
select PXA3xx
|
||||
select CPU_PXA300
|
||||
|
||||
config PXA_SHARPSL
|
||||
bool "SHARP Zaurus SL-5600, SL-C7xx and SL-Cxx00 Models"
|
||||
select SHARP_SCOOP
|
||||
select SHARP_PARAM
|
||||
select SHARP_SCOOP
|
||||
help
|
||||
Say Y here if you intend to run this kernel on a
|
||||
Sharp Zaurus SL-5600 (Poodle), SL-C700 (Corgi),
|
||||
@ -526,11 +526,11 @@ config MACH_HUSKY
|
||||
config MACH_AKITA
|
||||
bool "Enable Sharp SL-1000 (Akita) Support"
|
||||
depends on PXA_SHARPSL
|
||||
select PXA27x
|
||||
select PXA_SHARP_Cxx00
|
||||
select MACH_SPITZ
|
||||
select I2C
|
||||
select I2C_PXA
|
||||
select MACH_SPITZ
|
||||
select PXA27x
|
||||
select PXA_SHARP_Cxx00
|
||||
|
||||
config MACH_SPITZ
|
||||
bool "Enable Sharp Zaurus SL-3000 (Spitz) Support"
|
||||
@ -575,8 +575,8 @@ config MACH_ICONTROL
|
||||
|
||||
config ARCH_PXA_ESERIES
|
||||
bool "PXA based Toshiba e-series PDAs"
|
||||
select PXA25x
|
||||
select FB_W100
|
||||
select PXA25x
|
||||
|
||||
config MACH_E330
|
||||
bool "Toshiba e330"
|
||||
@ -628,8 +628,8 @@ config MACH_E800
|
||||
|
||||
config MACH_ZIPIT2
|
||||
bool "Zipit Z2 Handheld"
|
||||
select PXA27x
|
||||
select HAVE_PWM
|
||||
select PXA27x
|
||||
endif
|
||||
endmenu
|
||||
|
||||
@ -720,9 +720,9 @@ config SHARPSL_PM
|
||||
config SHARPSL_PM_MAX1111
|
||||
bool
|
||||
select HWMON
|
||||
select SENSORS_MAX1111
|
||||
select SPI
|
||||
select SPI_MASTER
|
||||
select SENSORS_MAX1111
|
||||
|
||||
config PXA_HAVE_ISA_IRQS
|
||||
bool
|
||||
|
||||
@ -21,8 +21,8 @@ config REALVIEW_EB_A9MP
|
||||
config REALVIEW_EB_ARM11MP
|
||||
bool "Support ARM11MPCore Tile"
|
||||
depends on MACH_REALVIEW_EB
|
||||
select CPU_V6K
|
||||
select ARCH_HAS_BARRIERS if SMP
|
||||
select CPU_V6K
|
||||
select HAVE_SMP
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
help
|
||||
@ -40,12 +40,12 @@ config REALVIEW_EB_ARM11MP_REVB
|
||||
|
||||
config MACH_REALVIEW_PB11MP
|
||||
bool "Support RealView(R) Platform Baseboard for ARM11MPCore"
|
||||
select CPU_V6K
|
||||
select ARCH_HAS_BARRIERS if SMP
|
||||
select ARM_GIC
|
||||
select CPU_V6K
|
||||
select HAVE_PATA_PLATFORM
|
||||
select HAVE_SMP
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
select ARCH_HAS_BARRIERS if SMP
|
||||
help
|
||||
Include support for the ARM(R) RealView(R) Platform Baseboard for
|
||||
the ARM11MPCore. This platform has an on-board ARM11MPCore and has
|
||||
@ -54,8 +54,8 @@ config MACH_REALVIEW_PB11MP
|
||||
# ARMv6 CPU without K extensions, but does have the new exclusive ops
|
||||
config MACH_REALVIEW_PB1176
|
||||
bool "Support RealView(R) Platform Baseboard for ARM1176JZF-S"
|
||||
select CPU_V6
|
||||
select ARM_GIC
|
||||
select CPU_V6
|
||||
select HAVE_TCM
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
help
|
||||
@ -73,8 +73,8 @@ config REALVIEW_PB1176_SECURE_FLASH
|
||||
|
||||
config MACH_REALVIEW_PBA8
|
||||
bool "Support RealView(R) Platform Baseboard for Cortex(tm)-A8 platform"
|
||||
select CPU_V7
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select HAVE_PATA_PLATFORM
|
||||
help
|
||||
Include support for the ARM(R) RealView Platform Baseboard for
|
||||
@ -83,11 +83,11 @@ config MACH_REALVIEW_PBA8
|
||||
|
||||
config MACH_REALVIEW_PBX
|
||||
bool "Support RealView(R) Platform Baseboard Explore"
|
||||
select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
|
||||
select ARM_GIC
|
||||
select HAVE_PATA_PLATFORM
|
||||
select HAVE_SMP
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
select ARCH_SPARSEMEM_ENABLE if CPU_V7 && !REALVIEW_HIGH_PHYS_OFFSET
|
||||
select ZONE_DMA if SPARSEMEM
|
||||
help
|
||||
Include support for the ARM(R) RealView(R) Platform Baseboard
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
config S3C2412_CPUFREQ
|
||||
bool
|
||||
depends on CPU_FREQ_S3C24XX && CPU_S3C2412
|
||||
select S3C2412_IOTIMING
|
||||
default y
|
||||
select S3C2412_IOTIMING
|
||||
help
|
||||
CPU Frequency scaling support for S3C2412 and S3C2413 SoC CPUs.
|
||||
|
||||
@ -5,8 +5,8 @@
|
||||
config S3C2440_CPUFREQ
|
||||
bool "S3C2440/S3C2442 CPU Frequency scaling support"
|
||||
depends on CPU_FREQ_S3C24XX && (CPU_S3C2440 || CPU_S3C2442)
|
||||
select S3C2410_CPUFREQ_UTILS
|
||||
default y
|
||||
select S3C2410_CPUFREQ_UTILS
|
||||
help
|
||||
CPU Frequency scaling support for S3C2440 and S3C2442 SoC CPUs.
|
||||
|
||||
|
||||
@ -17,10 +17,10 @@ config CPU_S3C2410
|
||||
bool "SAMSUNG S3C2410"
|
||||
default y
|
||||
select CPU_ARM920T
|
||||
select S3C2410_CLOCK
|
||||
select CPU_LLSERIAL_S3C2410
|
||||
select S3C2410_PM if PM
|
||||
select S3C2410_CLOCK
|
||||
select S3C2410_CPUFREQ if CPU_FREQ_S3C24XX
|
||||
select S3C2410_PM if PM
|
||||
help
|
||||
Support for S3C2410 and S3C2410A family from the S3C24XX line
|
||||
of Samsung Mobile CPUs.
|
||||
@ -30,8 +30,8 @@ config CPU_S3C2412
|
||||
depends on ARCH_S3C24XX
|
||||
select CPU_ARM926T
|
||||
select CPU_LLSERIAL_S3C2440
|
||||
select S3C2412_PM if PM
|
||||
select S3C2412_DMA if S3C24XX_DMA
|
||||
select S3C2412_PM if PM
|
||||
help
|
||||
Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
|
||||
|
||||
@ -40,10 +40,10 @@ config CPU_S3C2416
|
||||
depends on ARCH_S3C24XX
|
||||
select CPU_ARM926T
|
||||
select CPU_LLSERIAL_S3C2440
|
||||
select SAMSUNG_CLKSRC
|
||||
select S3C2416_PM if PM
|
||||
select S3C2443_COMMON
|
||||
select S3C2443_DMA if S3C24XX_DMA
|
||||
select S3C2416_PM if PM
|
||||
select SAMSUNG_CLKSRC
|
||||
help
|
||||
Support for the S3C2416 SoC from the S3C24XX line
|
||||
|
||||
@ -75,9 +75,9 @@ config CPU_S3C2443
|
||||
depends on ARCH_S3C24XX
|
||||
select CPU_ARM920T
|
||||
select CPU_LLSERIAL_S3C2440
|
||||
select SAMSUNG_CLKSRC
|
||||
select S3C2443_COMMON
|
||||
select S3C2443_DMA if S3C24XX_DMA
|
||||
select SAMSUNG_CLKSRC
|
||||
help
|
||||
Support for the S3C2443 SoC from the S3C24XX line
|
||||
|
||||
@ -156,16 +156,16 @@ config MACH_AML_M5900
|
||||
|
||||
config ARCH_BAST
|
||||
bool "Simtec Electronics BAST (EB2410ITX)"
|
||||
select S3C2410_IOTIMING if S3C2410_CPUFREQ
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select S3C24XX_SIMTEC_NOR
|
||||
select S3C24XX_SIMTEC_USB
|
||||
select MACH_BAST_IDE
|
||||
select S3C24XX_DCLK
|
||||
select ISA
|
||||
select MACH_BAST_IDE
|
||||
select S3C2410_IOTIMING if S3C2410_CPUFREQ
|
||||
select S3C24XX_DCLK
|
||||
select S3C24XX_SIMTEC_NOR
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select S3C24XX_SIMTEC_USB
|
||||
select S3C_DEV_HWMON
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Simtec Electronics EB2410ITX
|
||||
development board (also known as BAST)
|
||||
@ -181,9 +181,9 @@ config BAST_PC104_IRQ
|
||||
config ARCH_H1940
|
||||
bool "IPAQ H1940"
|
||||
select PM_H1940 if PM
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C24XX_SETUP_TS
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the HP IPAQ H1940
|
||||
|
||||
@ -203,23 +203,23 @@ config PM_H1940
|
||||
config MACH_N30
|
||||
bool "Acer N30 family"
|
||||
select MACH_N35
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you want suppt for the Acer N30, Acer N35,
|
||||
Navman PiN570, Yakumo AlphaX or Airis NC05 PDAs.
|
||||
|
||||
config MACH_OTOM
|
||||
bool "NexVision OTOM Board"
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Nex Vision OTOM board
|
||||
|
||||
config MACH_QT2410
|
||||
bool "QT2410"
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Armzone QT2410
|
||||
|
||||
@ -239,12 +239,12 @@ config MACH_TCT_HAMMER
|
||||
|
||||
config MACH_VR1000
|
||||
bool "Thorcom VR1000"
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select MACH_BAST_IDE
|
||||
select S3C24XX_DCLK
|
||||
select S3C24XX_SIMTEC_NOR
|
||||
select MACH_BAST_IDE
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select S3C24XX_SIMTEC_USB
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Thorcom VR1000 board.
|
||||
|
||||
@ -285,8 +285,8 @@ comment "S3C2412 Boards"
|
||||
|
||||
config MACH_JIVE
|
||||
bool "Logitech Jive"
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Logitech Jive.
|
||||
|
||||
@ -314,15 +314,15 @@ config MACH_SMDK2413
|
||||
bool "SMDK2413"
|
||||
select MACH_S3C2413
|
||||
select S3C24XX_SMDK
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using an SMDK2413
|
||||
|
||||
config MACH_VSTMS
|
||||
bool "VMSTMS"
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using an VSTMS board
|
||||
|
||||
@ -351,13 +351,13 @@ comment "S3C2416 Boards"
|
||||
|
||||
config MACH_SMDK2416
|
||||
bool "SMDK2416"
|
||||
select S3C2416_SETUP_SDHCI
|
||||
select S3C24XX_SMDK
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C2416_SETUP_SDHCI
|
||||
help
|
||||
Say Y here if you are using an SMDK2416
|
||||
|
||||
@ -379,11 +379,11 @@ comment "S3C2440 Boards"
|
||||
|
||||
config MACH_ANUBIS
|
||||
bool "Simtec Electronics ANUBIS"
|
||||
select S3C24XX_DCLK
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select HAVE_PATA_PLATFORM
|
||||
select S3C24XX_GPIO_EXTRA64
|
||||
select S3C2440_XTAL_12000000
|
||||
select S3C24XX_DCLK
|
||||
select S3C24XX_GPIO_EXTRA64
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Simtec Electronics ANUBIS
|
||||
@ -391,18 +391,18 @@ config MACH_ANUBIS
|
||||
|
||||
config MACH_AT2440EVB
|
||||
bool "Avantech AT2440EVB development board"
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the AT2440EVB development board
|
||||
|
||||
config MACH_MINI2440
|
||||
bool "MINI2440 development board"
|
||||
select EEPROM_AT24
|
||||
select NEW_LEDS
|
||||
select LEDS_CLASS
|
||||
select LEDS_TRIGGER
|
||||
select LEDS_TRIGGER_BACKLIGHT
|
||||
select NEW_LEDS
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
@ -412,20 +412,20 @@ config MACH_MINI2440
|
||||
config MACH_NEXCODER_2440
|
||||
bool "NexVision NEXCODER 2440 Light Board"
|
||||
select S3C2440_XTAL_12000000
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Nex Vision NEXCODER 2440 Light Board
|
||||
|
||||
config MACH_OSIRIS
|
||||
bool "Simtec IM2440D20 (OSIRIS) module"
|
||||
select S3C24XX_DCLK
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select S3C24XX_GPIO_EXTRA128
|
||||
select S3C2440_XTAL_12000000
|
||||
select S3C2410_IOTIMING if S3C2440_CPUFREQ
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C2440_XTAL_12000000
|
||||
select S3C24XX_DCLK
|
||||
select S3C24XX_GPIO_EXTRA128
|
||||
select S3C24XX_SIMTEC_PM if PM
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the Simtec IM2440D20 module, also
|
||||
known as the Osiris.
|
||||
@ -445,8 +445,8 @@ config MACH_OSIRIS_DVS
|
||||
|
||||
config MACH_RX3715
|
||||
bool "HP iPAQ rx3715"
|
||||
select S3C2440_XTAL_16934400
|
||||
select PM_H1940 if PM
|
||||
select S3C2440_XTAL_16934400
|
||||
select S3C_DEV_NAND
|
||||
help
|
||||
Say Y here if you are using the HP iPAQ rx3715.
|
||||
@ -455,8 +455,8 @@ config ARCH_S3C2440
|
||||
bool "SMDK2440"
|
||||
select S3C2440_XTAL_16934400
|
||||
select S3C24XX_SMDK
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Say Y here if you are using the SMDK2440.
|
||||
|
||||
@ -478,11 +478,11 @@ comment "S3C2442 Boards"
|
||||
|
||||
config MACH_NEO1973_GTA02
|
||||
bool "Openmoko GTA02 / Freerunner phone"
|
||||
select I2C
|
||||
select MACH_NEO1973
|
||||
select MFD_PCF50633
|
||||
select PCF50633_GPIO
|
||||
select I2C
|
||||
select POWER_SUPPLY
|
||||
select MACH_NEO1973
|
||||
select S3C24XX_PWM
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
@ -490,13 +490,13 @@ config MACH_NEO1973_GTA02
|
||||
|
||||
config MACH_RX1950
|
||||
bool "HP iPAQ rx1950"
|
||||
select S3C24XX_DCLK
|
||||
select PM_H1940 if PM
|
||||
select I2C
|
||||
select S3C24XX_PWM
|
||||
select S3C_DEV_NAND
|
||||
select PM_H1940 if PM
|
||||
select S3C2410_IOTIMING if S3C2440_CPUFREQ
|
||||
select S3C2440_XTAL_16934400
|
||||
select S3C24XX_DCLK
|
||||
select S3C24XX_PWM
|
||||
select S3C_DEV_NAND
|
||||
help
|
||||
Say Y here if you're using HP iPAQ rx1950
|
||||
|
||||
|
||||
@ -7,9 +7,9 @@
|
||||
config PLAT_S3C64XX
|
||||
bool
|
||||
depends on ARCH_S3C64XX
|
||||
select SAMSUNG_WAKEMASK
|
||||
select PM_GENERIC_DOMAINS
|
||||
default y
|
||||
select PM_GENERIC_DOMAINS
|
||||
select SAMSUNG_WAKEMASK
|
||||
help
|
||||
Base platform code for any Samsung S3C64XX device
|
||||
|
||||
@ -31,8 +31,8 @@ config S3C64XX_DMA
|
||||
select S3C_DMA
|
||||
|
||||
config S3C64XX_SETUP_SDHCI
|
||||
select S3C64XX_SETUP_SDHCI_GPIO
|
||||
bool
|
||||
select S3C64XX_SETUP_SDHCI_GPIO
|
||||
help
|
||||
Internal configuration for default SDHCI setup for S3C6400 and
|
||||
S3C6410 SoCs.
|
||||
@ -93,9 +93,9 @@ config S3C64XX_SETUP_USB_PHY
|
||||
config MACH_SMDK6400
|
||||
bool "SMDK6400"
|
||||
select CPU_S3C6400
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_NAND
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
help
|
||||
Machine support for the Samsung SMDK6400
|
||||
|
||||
@ -104,21 +104,21 @@ config MACH_SMDK6400
|
||||
config MACH_ANW6410
|
||||
bool "A&W6410"
|
||||
select CPU_S3C6410
|
||||
select S3C_DEV_FB
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C_DEV_FB
|
||||
help
|
||||
Machine support for the A&W6410
|
||||
|
||||
config MACH_MINI6410
|
||||
bool "MINI6410"
|
||||
select CPU_S3C6410
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_FB
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C_DEV_USB_HOST
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_TS
|
||||
help
|
||||
@ -127,42 +127,42 @@ config MACH_MINI6410
|
||||
config MACH_REAL6410
|
||||
bool "REAL6410"
|
||||
select CPU_S3C6410
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C_DEV_FB
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_TS
|
||||
select S3C_DEV_USB_HOST
|
||||
help
|
||||
Machine support for the CoreWind REAL6410
|
||||
|
||||
config MACH_SMDK6410
|
||||
bool "SMDK6410"
|
||||
select CPU_S3C6410
|
||||
select SAMSUNG_DEV_ADC
|
||||
select HAVE_S3C2410_WATCHDOG if WATCHDOG
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_I2C1
|
||||
select S3C64XX_SETUP_IDE
|
||||
select S3C64XX_SETUP_KEYPAD
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C64XX_SETUP_USB_PHY
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_I2C1
|
||||
select SAMSUNG_DEV_IDE
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_RTC
|
||||
select SAMSUNG_DEV_TS
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_WDT
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_IDE
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select SAMSUNG_DEV_PWM
|
||||
select HAVE_S3C2410_WATCHDOG if WATCHDOG
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C64XX_SETUP_I2C1
|
||||
select S3C64XX_SETUP_IDE
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_KEYPAD
|
||||
select S3C64XX_SETUP_USB_PHY
|
||||
select SAMSUNG_DEV_TS
|
||||
help
|
||||
Machine support for the Samsung SMDK6410
|
||||
|
||||
@ -198,13 +198,13 @@ endchoice
|
||||
config SMDK6410_WM1190_EV1
|
||||
bool "Support Wolfson Microelectronics 1190-EV1 PMIC card"
|
||||
depends on MACH_SMDK6410
|
||||
select MFD_WM8350_CONFIG_MODE_0
|
||||
select MFD_WM8350_CONFIG_MODE_3
|
||||
select MFD_WM8350_I2C
|
||||
select MFD_WM8352_CONFIG_MODE_0
|
||||
select REGULATOR
|
||||
select REGULATOR_WM8350
|
||||
select SAMSUNG_GPIO_EXTRA64
|
||||
select MFD_WM8350_I2C
|
||||
select MFD_WM8350_CONFIG_MODE_0
|
||||
select MFD_WM8350_CONFIG_MODE_3
|
||||
select MFD_WM8352_CONFIG_MODE_0
|
||||
help
|
||||
The Wolfson Microelectronics 1190-EV1 is a WM835x based PMIC
|
||||
and audio daughtercard for the Samsung SMDK6410 reference
|
||||
@ -216,11 +216,11 @@ config SMDK6410_WM1190_EV1
|
||||
config SMDK6410_WM1192_EV1
|
||||
bool "Support Wolfson Microelectronics 1192-EV1 PMIC card"
|
||||
depends on MACH_SMDK6410
|
||||
select MFD_WM831X
|
||||
select MFD_WM831X_I2C
|
||||
select REGULATOR
|
||||
select REGULATOR_WM831X
|
||||
select SAMSUNG_GPIO_EXTRA64
|
||||
select MFD_WM831X
|
||||
select MFD_WM831X_I2C
|
||||
help
|
||||
The Wolfson Microelectronics 1192-EV1 is a WM831x based PMIC
|
||||
daughtercard for the Samsung SMDK6410 reference platform.
|
||||
@ -232,19 +232,19 @@ config SMDK6410_WM1192_EV1
|
||||
config MACH_NCP
|
||||
bool "NCP"
|
||||
select CPU_S3C6410
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C64XX_SETUP_I2C1
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_I2C1
|
||||
help
|
||||
Machine support for the Samsung NCP
|
||||
|
||||
config MACH_HMT
|
||||
bool "Airgoo HMT"
|
||||
select CPU_S3C6410
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_NAND
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select SAMSUNG_DEV_PWM
|
||||
help
|
||||
Machine support for the Airgoo HMT
|
||||
@ -252,17 +252,17 @@ config MACH_HMT
|
||||
config MACH_SMARTQ
|
||||
bool
|
||||
select CPU_S3C6410
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C64XX_SETUP_USB_PHY
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_HWMON
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_USB_PHY
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_TS
|
||||
@ -284,26 +284,26 @@ config MACH_SMARTQ7
|
||||
config MACH_WLF_CRAGG_6410
|
||||
bool "Wolfson Cragganmore 6410"
|
||||
select CPU_S3C6410
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select I2C
|
||||
select LEDS_GPIO_REGISTER
|
||||
select S3C64XX_DEV_SPI0
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_I2C1
|
||||
select S3C64XX_SETUP_IDE
|
||||
select S3C64XX_SETUP_FB_24BPP
|
||||
select S3C64XX_SETUP_KEYPAD
|
||||
select S3C64XX_SETUP_SDHCI
|
||||
select S3C64XX_SETUP_SPI
|
||||
select S3C64XX_SETUP_USB_PHY
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_WDT
|
||||
select S3C_DEV_RTC
|
||||
select S3C64XX_DEV_SPI0
|
||||
select S3C_DEV_USB_HOST
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_WDT
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select SAMSUNG_GPIO_EXTRA128
|
||||
select I2C
|
||||
select LEDS_GPIO_REGISTER
|
||||
help
|
||||
Machine support for the Wolfson Cragganmore S3C6410 variant.
|
||||
|
||||
@ -9,18 +9,18 @@ if ARCH_S5P64X0
|
||||
|
||||
config CPU_S5P6440
|
||||
bool
|
||||
select SAMSUNG_DMADEV
|
||||
select S5P_HRT
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
select SAMSUNG_WAKEMASK if PM
|
||||
help
|
||||
Enable S5P6440 CPU support
|
||||
|
||||
config CPU_S5P6450
|
||||
bool
|
||||
select SAMSUNG_DMADEV
|
||||
select S5P_HRT
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
select SAMSUNG_WAKEMASK if PM
|
||||
help
|
||||
Enable S5P6450 CPU support
|
||||
@ -52,19 +52,19 @@ config MACH_SMDK6440
|
||||
bool "SMDK6440"
|
||||
select CPU_S5P6440
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select S5P64X0_SETUP_FB_24BPP
|
||||
select S5P64X0_SETUP_I2C1
|
||||
select S5P64X0_SETUP_SDHCI_GPIO
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_TS
|
||||
select S5P64X0_SETUP_FB_24BPP
|
||||
select S5P64X0_SETUP_I2C1
|
||||
select S5P64X0_SETUP_SDHCI_GPIO
|
||||
help
|
||||
Machine support for the Samsung SMDK6440
|
||||
|
||||
@ -72,19 +72,19 @@ config MACH_SMDK6450
|
||||
bool "SMDK6450"
|
||||
select CPU_S5P6450
|
||||
select S3C_DEV_FB
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select S5P64X0_SETUP_FB_24BPP
|
||||
select S5P64X0_SETUP_I2C1
|
||||
select S5P64X0_SETUP_SDHCI_GPIO
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_TS
|
||||
select S5P64X0_SETUP_FB_24BPP
|
||||
select S5P64X0_SETUP_I2C1
|
||||
select S5P64X0_SETUP_SDHCI_GPIO
|
||||
help
|
||||
Machine support for the Samsung SMDK6450
|
||||
|
||||
|
||||
@ -60,12 +60,6 @@ config MACH_SMDKC100
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_IDE
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_TS
|
||||
select S5PC100_SETUP_FB_24BPP
|
||||
select S5PC100_SETUP_I2C1
|
||||
select S5PC100_SETUP_IDE
|
||||
@ -74,6 +68,12 @@ config MACH_SMDKC100
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select SAMSUNG_DEV_ADC
|
||||
select SAMSUNG_DEV_BACKLIGHT
|
||||
select SAMSUNG_DEV_IDE
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_TS
|
||||
help
|
||||
Machine support for the Samsung SMDKC100
|
||||
|
||||
|
||||
@ -11,11 +11,11 @@ if ARCH_S5PV210
|
||||
|
||||
config CPU_S5PV210
|
||||
bool
|
||||
select SAMSUNG_DMADEV
|
||||
select S5P_EXT_INT
|
||||
select S5P_HRT
|
||||
select S5P_PM if PM
|
||||
select S5P_SLEEP if PM
|
||||
select SAMSUNG_DMADEV
|
||||
help
|
||||
Enable S5PV210 CPU support
|
||||
|
||||
@ -76,44 +76,44 @@ config MACH_AQUILA
|
||||
bool "Aquila"
|
||||
select CPU_S5PV210
|
||||
select S3C_DEV_FB
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S5P_DEV_ONENAND
|
||||
select S5PV210_SETUP_FB_24BPP
|
||||
select S5PV210_SETUP_SDHCI
|
||||
select S5PV210_SETUP_USB_PHY
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_ONENAND
|
||||
help
|
||||
Machine support for the Samsung Aquila target based on S5PC110 SoC
|
||||
|
||||
config MACH_GONI
|
||||
bool "GONI"
|
||||
select CPU_S5PV210
|
||||
select S5P_GPIO_INT
|
||||
select S3C_DEV_FB
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
select S3C_DEV_I2C1
|
||||
select S3C_DEV_I2C2
|
||||
select S5P_DEV_MFC
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S5P_DEV_ONENAND
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select S5P_DEV_TV
|
||||
select S5PV210_SETUP_FB_24BPP
|
||||
select S5PV210_SETUP_FIMC
|
||||
select S5PV210_SETUP_I2C1
|
||||
select S5PV210_SETUP_I2C2
|
||||
select S5PV210_SETUP_KEYPAD
|
||||
select S5PV210_SETUP_SDHCI
|
||||
select S5PV210_SETUP_FIMC
|
||||
select S5PV210_SETUP_USB_PHY
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_MFC
|
||||
select S5P_DEV_ONENAND
|
||||
select S5P_DEV_TV
|
||||
select S5P_GPIO_INT
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
help
|
||||
Machine support for Samsung GONI board
|
||||
S5PC110(MCP) is one of package option of S5PV210
|
||||
@ -125,14 +125,14 @@ config MACH_SMDKC110
|
||||
select S3C_DEV_I2C2
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_WDT
|
||||
select S5PV210_SETUP_I2C1
|
||||
select S5PV210_SETUP_I2C2
|
||||
select S5PV210_SETUP_IDE
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
select S5P_DEV_MFC
|
||||
select SAMSUNG_DEV_IDE
|
||||
select S5PV210_SETUP_I2C1
|
||||
select S5PV210_SETUP_I2C2
|
||||
select S5PV210_SETUP_IDE
|
||||
help
|
||||
Machine support for Samsung SMDKC110
|
||||
S5PC110(MCP) is one of package option of S5PV210
|
||||
@ -154,6 +154,13 @@ config MACH_SMDKV210
|
||||
select S3C_DEV_RTC
|
||||
select S3C_DEV_USB_HSOTG
|
||||
select S3C_DEV_WDT
|
||||
select S5PV210_SETUP_FB_24BPP
|
||||
select S5PV210_SETUP_I2C1
|
||||
select S5PV210_SETUP_I2C2
|
||||
select S5PV210_SETUP_IDE
|
||||
select S5PV210_SETUP_KEYPAD
|
||||
select S5PV210_SETUP_SDHCI
|
||||
select S5PV210_SETUP_USB_PHY
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
select S5P_DEV_FIMC2
|
||||
@ -165,20 +172,13 @@ config MACH_SMDKV210
|
||||
select SAMSUNG_DEV_KEYPAD
|
||||
select SAMSUNG_DEV_PWM
|
||||
select SAMSUNG_DEV_TS
|
||||
select S5PV210_SETUP_FB_24BPP
|
||||
select S5PV210_SETUP_I2C1
|
||||
select S5PV210_SETUP_I2C2
|
||||
select S5PV210_SETUP_IDE
|
||||
select S5PV210_SETUP_KEYPAD
|
||||
select S5PV210_SETUP_SDHCI
|
||||
select S5PV210_SETUP_USB_PHY
|
||||
help
|
||||
Machine support for Samsung SMDKV210
|
||||
|
||||
config MACH_TORBRECK
|
||||
bool "Torbreck"
|
||||
select CPU_S5PV210
|
||||
select ARCH_SPARSEMEM_ENABLE
|
||||
select CPU_S5PV210
|
||||
select S3C_DEV_HSMMC
|
||||
select S3C_DEV_HSMMC1
|
||||
select S3C_DEV_HSMMC2
|
||||
|
||||
@ -49,15 +49,15 @@ config SA1100_COLLIE
|
||||
bool "Sharp Zaurus SL5500"
|
||||
# FIXME: select CPU_FREQ_SA11x0
|
||||
select SHARP_LOCOMO
|
||||
select SHARP_SCOOP
|
||||
select SHARP_PARAM
|
||||
select SHARP_SCOOP
|
||||
help
|
||||
Say Y here to support the Sharp Zaurus SL5500 PDAs.
|
||||
|
||||
config SA1100_H3100
|
||||
bool "Compaq iPAQ H3100"
|
||||
select HTC_EGPIO
|
||||
select CPU_FREQ_SA1110
|
||||
select HTC_EGPIO
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the Compaq iPAQ
|
||||
H3100 handheld computer. Information about this machine and the
|
||||
@ -67,8 +67,8 @@ config SA1100_H3100
|
||||
|
||||
config SA1100_H3600
|
||||
bool "Compaq iPAQ H3600/H3700"
|
||||
select HTC_EGPIO
|
||||
select CPU_FREQ_SA1110
|
||||
select HTC_EGPIO
|
||||
help
|
||||
Say Y here if you intend to run this kernel on the Compaq iPAQ
|
||||
H3600 handheld computer. Information about this machine and the
|
||||
@ -78,16 +78,16 @@ config SA1100_H3600
|
||||
|
||||
config SA1100_BADGE4
|
||||
bool "HP Labs BadgePAD 4"
|
||||
select SA1111
|
||||
select CPU_FREQ_SA1100
|
||||
select SA1111
|
||||
help
|
||||
Say Y here if you want to build a kernel for the HP Laboratories
|
||||
BadgePAD 4.
|
||||
|
||||
config SA1100_JORNADA720
|
||||
bool "HP Jornada 720"
|
||||
select SA1111
|
||||
# FIXME: select CPU_FREQ_SA11x0
|
||||
select SA1111
|
||||
help
|
||||
Say Y here if you want to build a kernel for the HP Jornada 720
|
||||
handheld computer. See
|
||||
@ -95,8 +95,8 @@ config SA1100_JORNADA720
|
||||
|
||||
config SA1100_JORNADA720_SSP
|
||||
bool "HP Jornada 720 Extended SSP driver"
|
||||
select SA1100_SSP
|
||||
depends on SA1100_JORNADA720
|
||||
select SA1100_SSP
|
||||
help
|
||||
Say Y here if you have a HP Jornada 7xx handheld computer and you
|
||||
want to access devices connected to the MCU. Those include the
|
||||
|
||||
@ -4,49 +4,49 @@ comment "SH-Mobile System Type"
|
||||
|
||||
config ARCH_SH7367
|
||||
bool "SH-Mobile G3 (SH7367)"
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select CPU_V6
|
||||
select SH_CLK_CPG
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
|
||||
config ARCH_SH7377
|
||||
bool "SH-Mobile G4 (SH7377)"
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select CPU_V7
|
||||
select SH_CLK_CPG
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
|
||||
config ARCH_SH7372
|
||||
bool "SH-Mobile AP4 (SH7372)"
|
||||
select CPU_V7
|
||||
select SH_CLK_CPG
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARM_CPU_SUSPEND if PM || CPU_IDLE
|
||||
select CPU_V7
|
||||
select SH_CLK_CPG
|
||||
|
||||
config ARCH_SH73A0
|
||||
bool "SH-Mobile AG5 (R8A73A00)"
|
||||
select CPU_V7
|
||||
select SH_CLK_CPG
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select I2C
|
||||
select SH_CLK_CPG
|
||||
|
||||
config ARCH_R8A7740
|
||||
bool "R-Mobile A1 (R8A77400)"
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select CPU_V7
|
||||
select SH_CLK_CPG
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
|
||||
config ARCH_R8A7779
|
||||
bool "R-Car H1 (R8A77790)"
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select SH_CLK_CPG
|
||||
select ARM_GIC
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
|
||||
config ARCH_EMEV2
|
||||
bool "Emma Mobile EV2"
|
||||
select CPU_V7
|
||||
select ARM_GIC
|
||||
select ARCH_WANT_OPTIONAL_GPIOLIB
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
|
||||
comment "SH-Mobile Board Type"
|
||||
|
||||
@ -65,9 +65,9 @@ config MACH_AP4EVB
|
||||
bool "AP4EVB board"
|
||||
depends on ARCH_SH7372
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SH_LCD_MIPI_DSI
|
||||
select SND_SOC_AK4642 if SND_SIMPLE_CARD
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
|
||||
choice
|
||||
prompt "AP4EVB LCD panel selection"
|
||||
@ -84,37 +84,37 @@ endchoice
|
||||
|
||||
config MACH_AG5EVM
|
||||
bool "AG5EVM board"
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select SH_LCD_MIPI_DSI
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
depends on ARCH_SH73A0
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SH_LCD_MIPI_DSI
|
||||
|
||||
config MACH_MACKEREL
|
||||
bool "mackerel board"
|
||||
depends on ARCH_SH7372
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select SND_SOC_AK4642 if SND_SIMPLE_CARD
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SND_SOC_AK4642 if SND_SIMPLE_CARD
|
||||
|
||||
config MACH_KOTA2
|
||||
bool "KOTA2 board"
|
||||
depends on ARCH_SH73A0
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
depends on ARCH_SH73A0
|
||||
|
||||
config MACH_BONITO
|
||||
bool "bonito board"
|
||||
depends on ARCH_R8A7740
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
depends on ARCH_R8A7740
|
||||
|
||||
config MACH_ARMADILLO800EVA
|
||||
bool "Armadillo-800 EVA board"
|
||||
depends on ARCH_R8A7740
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select USE_OF
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SND_SOC_WM8978 if SND_SIMPLE_CARD
|
||||
select USE_OF
|
||||
|
||||
config MACH_MARZEN
|
||||
bool "MARZEN board"
|
||||
@ -125,16 +125,16 @@ config MACH_MARZEN
|
||||
config MACH_KZM9D
|
||||
bool "KZM9D board"
|
||||
depends on ARCH_EMEV2
|
||||
select USE_OF
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select USE_OF
|
||||
|
||||
config MACH_KZM9G
|
||||
bool "KZM-A9-GT board"
|
||||
depends on ARCH_SH73A0
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select USE_OF
|
||||
select SND_SOC_AK4642 if SND_SIMPLE_CARD
|
||||
select REGULATOR_FIXED_VOLTAGE if REGULATOR
|
||||
select SND_SOC_AK4642 if SND_SIMPLE_CARD
|
||||
select USE_OF
|
||||
|
||||
comment "SH-Mobile System Configuration"
|
||||
|
||||
|
||||
@ -4,42 +4,42 @@ comment "NVIDIA Tegra options"
|
||||
|
||||
config ARCH_TEGRA_2x_SOC
|
||||
bool "Enable support for Tegra20 family"
|
||||
select CPU_V7
|
||||
select ARM_GIC
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select PINCTRL
|
||||
select PINCTRL_TEGRA20
|
||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||
select USB_ULPI if USB
|
||||
select USB_ULPI_VIEWPORT if USB_SUPPORT
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_ERRATA_742230
|
||||
select ARM_ERRATA_751472
|
||||
select ARM_ERRATA_754327
|
||||
select ARM_ERRATA_764369 if SMP
|
||||
select ARM_GIC
|
||||
select CPU_FREQ_TABLE if CPU_FREQ
|
||||
select CPU_V7
|
||||
select PINCTRL
|
||||
select PINCTRL_TEGRA20
|
||||
select PL310_ERRATA_727915 if CACHE_L2X0
|
||||
select PL310_ERRATA_769419 if CACHE_L2X0
|
||||
select CPU_FREQ_TABLE if CPU_FREQ
|
||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||
select USB_ULPI if USB
|
||||
select USB_ULPI_VIEWPORT if USB_SUPPORT
|
||||
help
|
||||
Support for NVIDIA Tegra AP20 and T20 processors, based on the
|
||||
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
|
||||
|
||||
config ARCH_TEGRA_3x_SOC
|
||||
bool "Enable support for Tegra30 family"
|
||||
select CPU_V7
|
||||
select ARM_GIC
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select PINCTRL
|
||||
select PINCTRL_TEGRA30
|
||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||
select USB_ULPI if USB
|
||||
select USB_ULPI_VIEWPORT if USB_SUPPORT
|
||||
select ARM_ERRATA_743622
|
||||
select ARM_ERRATA_751472
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369 if SMP
|
||||
select PL310_ERRATA_769419 if CACHE_L2X0
|
||||
select ARM_GIC
|
||||
select CPU_FREQ_TABLE if CPU_FREQ
|
||||
select CPU_V7
|
||||
select PINCTRL
|
||||
select PINCTRL_TEGRA30
|
||||
select PL310_ERRATA_769419 if CACHE_L2X0
|
||||
select USB_ARCH_HAS_EHCI if USB_SUPPORT
|
||||
select USB_ULPI if USB
|
||||
select USB_ULPI_VIEWPORT if USB_SUPPORT
|
||||
help
|
||||
Support for NVIDIA Tegra T30 processor family, based on the
|
||||
ARM CortexA9MP CPU and the ARM PL310 L2 cache controller
|
||||
|
||||
@ -7,8 +7,8 @@ comment "ST-Ericsson Mobile Platform Products"
|
||||
config MACH_U300
|
||||
bool "U300"
|
||||
select PINCTRL
|
||||
select PINCTRL_U300
|
||||
select PINCTRL_COH901
|
||||
select PINCTRL_U300
|
||||
|
||||
comment "ST-Ericsson U300/U335 Feature Selections"
|
||||
|
||||
|
||||
@ -3,33 +3,33 @@ if ARCH_U8500
|
||||
config UX500_SOC_COMMON
|
||||
bool
|
||||
default y
|
||||
select ARM_GIC
|
||||
select HAS_MTU
|
||||
select PL310_ERRATA_753970 if CACHE_PL310
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369 if SMP
|
||||
select ARM_GIC
|
||||
select CACHE_L2X0
|
||||
select COMMON_CLK
|
||||
select HAS_MTU
|
||||
select PINCTRL
|
||||
select PINCTRL_NOMADIK
|
||||
select COMMON_CLK
|
||||
select PL310_ERRATA_753970 if CACHE_PL310
|
||||
|
||||
config UX500_SOC_DB8500
|
||||
bool
|
||||
select CPU_FREQ_TABLE if CPU_FREQ
|
||||
select MFD_DB8500_PRCMU
|
||||
select PINCTRL_DB8500
|
||||
select REGULATOR
|
||||
select REGULATOR_DB8500_PRCMU
|
||||
select CPU_FREQ_TABLE if CPU_FREQ
|
||||
select PINCTRL_DB8500
|
||||
|
||||
menu "Ux500 target platform (boards)"
|
||||
|
||||
config MACH_MOP500
|
||||
bool "U8500 Development platform, MOP500 versions"
|
||||
select UX500_SOC_DB8500
|
||||
select I2C
|
||||
select I2C_NOMADIK
|
||||
select SOC_BUS
|
||||
select REGULATOR_FIXED_VOLTAGE
|
||||
select SOC_BUS
|
||||
select UX500_SOC_DB8500
|
||||
help
|
||||
Include support for the MOP500 development platform.
|
||||
|
||||
|
||||
@ -3,9 +3,9 @@ menu "Versatile platform type"
|
||||
|
||||
config ARCH_VERSATILE_PB
|
||||
bool "Support Versatile Platform Baseboard for ARM926EJ-S"
|
||||
default y
|
||||
select CPU_ARM926T
|
||||
select MIGHT_HAVE_PCI
|
||||
default y
|
||||
help
|
||||
Include support for the ARM(R) Versatile Platform Baseboard
|
||||
for the ARM926EJ-S.
|
||||
@ -19,8 +19,8 @@ config MACH_VERSATILE_AB
|
||||
|
||||
config MACH_VERSATILE_DT
|
||||
bool "Support Versatile platform from device tree"
|
||||
select USE_OF
|
||||
select CPU_ARM926T
|
||||
select USE_OF
|
||||
help
|
||||
Include support for the ARM(R) Versatile/PB platform,
|
||||
using the device tree for discovery
|
||||
|
||||
@ -10,8 +10,8 @@ config CPU_ARM7TDMI
|
||||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_LV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4
|
||||
select CPU_PABRT_LEGACY
|
||||
help
|
||||
A 32-bit RISC microprocessor based on the ARM7 processor core
|
||||
which has no memory control unit and cache.
|
||||
@ -24,11 +24,11 @@ config CPU_ARM720T
|
||||
bool "Support ARM720T processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_LV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WT if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WT if MMU
|
||||
help
|
||||
A 32-bit RISC processor with 8kByte Cache, Write Buffer and
|
||||
@ -43,9 +43,9 @@ config CPU_ARM740T
|
||||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_LV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V3 # although the core is v4t
|
||||
select CPU_CP15_MPU
|
||||
select CPU_PABRT_LEGACY
|
||||
help
|
||||
A 32-bit RISC processor with 8KB cache or 4KB variants,
|
||||
write buffer and MPU(Protection Unit) built around
|
||||
@ -60,8 +60,8 @@ config CPU_ARM9TDMI
|
||||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_NOMMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4
|
||||
select CPU_PABRT_LEGACY
|
||||
help
|
||||
A 32-bit RISC microprocessor based on the ARM9 processor core
|
||||
which has no memory control unit and cache.
|
||||
@ -74,11 +74,11 @@ config CPU_ARM920T
|
||||
bool "Support ARM920T processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
help
|
||||
The ARM920T is licensed to be produced by numerous vendors,
|
||||
@ -92,11 +92,11 @@ config CPU_ARM922T
|
||||
bool "Support ARM922T processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
help
|
||||
The ARM922T is a version of the ARM920T, but with smaller
|
||||
@ -111,11 +111,11 @@ config CPU_ARM925T
|
||||
bool "Support ARM925T processor" if ARCH_OMAP1
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
help
|
||||
The ARM925T is a mix between the ARM920T and ARM926T, but with
|
||||
@ -130,10 +130,10 @@ config CPU_ARM926T
|
||||
bool "Support ARM926T processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5TJ
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
help
|
||||
This is a variant of the ARM920. It has slightly different
|
||||
@ -148,11 +148,11 @@ config CPU_FA526
|
||||
bool
|
||||
select CPU_32v4
|
||||
select CPU_ABRT_EV4
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_CACHE_FA
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_COPY_FA if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_FA if MMU
|
||||
help
|
||||
The FA526 is a version of the ARMv4 compatible processor with
|
||||
@ -167,9 +167,9 @@ config CPU_ARM940T
|
||||
depends on !MMU
|
||||
select CPU_32v4T
|
||||
select CPU_ABRT_NOMMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MPU
|
||||
select CPU_PABRT_LEGACY
|
||||
help
|
||||
ARM940T is a member of the ARM9TDMI family of general-
|
||||
purpose microprocessors with MPU and separate 4KB
|
||||
@ -185,9 +185,9 @@ config CPU_ARM946E
|
||||
depends on !MMU
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_NOMMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MPU
|
||||
select CPU_PABRT_LEGACY
|
||||
help
|
||||
ARM946E-S is a member of the ARM9E-S family of high-
|
||||
performance, 32-bit system-on-chip processor solutions.
|
||||
@ -201,11 +201,11 @@ config CPU_ARM1020
|
||||
bool "Support ARM1020T (rev 0) processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
help
|
||||
The ARM1020 is the 32K cached version of the ARM10 processor,
|
||||
@ -217,25 +217,25 @@ config CPU_ARM1020
|
||||
# ARM1020E - needs validating
|
||||
config CPU_ARM1020E
|
||||
bool "Support ARM1020E processor" if ARCH_INTEGRATOR
|
||||
depends on n
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WT
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
depends on n
|
||||
|
||||
# ARM1022E
|
||||
config CPU_ARM1022
|
||||
bool "Support ARM1022E processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV4T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU # can probably do better
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
help
|
||||
The ARM1022E is an implementation of the ARMv5TE architecture
|
||||
@ -250,10 +250,10 @@ config CPU_ARM1026
|
||||
bool "Support ARM1026EJ-S processor" if ARCH_INTEGRATOR
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T # But need Jazelle, but EV5TJ ignores bit 10
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU # can probably do better
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
help
|
||||
The ARM1026EJ-S is an implementation of the ARMv5TEJ architecture
|
||||
@ -268,11 +268,11 @@ config CPU_SA110
|
||||
select CPU_32v3 if ARCH_RPC
|
||||
select CPU_32v4 if !ARCH_RPC
|
||||
select CPU_ABRT_EV4
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WB
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WB if MMU
|
||||
help
|
||||
The Intel StrongARM(R) SA-110 is a 32-bit microprocessor and
|
||||
@ -288,10 +288,10 @@ config CPU_SA1100
|
||||
bool
|
||||
select CPU_32v4
|
||||
select CPU_ABRT_EV4
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_V4WB
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WB if MMU
|
||||
|
||||
# XScale
|
||||
@ -299,9 +299,9 @@ config CPU_XSCALE
|
||||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
|
||||
# XScale Core Version 3
|
||||
@ -309,9 +309,9 @@ config CPU_XSC3
|
||||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
select IO_36
|
||||
|
||||
@ -320,21 +320,21 @@ config CPU_MOHAWK
|
||||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
select CPU_COPY_V4WB if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_V4WBI if MMU
|
||||
|
||||
# Feroceon
|
||||
config CPU_FEROCEON
|
||||
bool
|
||||
select CPU_32v5
|
||||
select CPU_ABRT_EV5T
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_CACHE_VIVT
|
||||
select CPU_CP15_MMU
|
||||
select CPU_COPY_FEROCEON if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_PABRT_LEGACY
|
||||
select CPU_TLB_FEROCEON if MMU
|
||||
|
||||
config CPU_FEROCEON_OLD_ID
|
||||
@ -349,20 +349,20 @@ config CPU_FEROCEON_OLD_ID
|
||||
# Marvell PJ4
|
||||
config CPU_PJ4
|
||||
bool
|
||||
select CPU_V7
|
||||
select ARM_THUMBEE
|
||||
select CPU_V7
|
||||
|
||||
# ARMv6
|
||||
config CPU_V6
|
||||
bool "Support ARM V6 processor" if ARCH_INTEGRATOR || MACH_REALVIEW_EB || MACH_REALVIEW_PBX
|
||||
select CPU_32v6
|
||||
select CPU_ABRT_EV6
|
||||
select CPU_PABRT_V6
|
||||
select CPU_CACHE_V6
|
||||
select CPU_CACHE_VIPT
|
||||
select CPU_COPY_V6 if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_HAS_ASID if MMU
|
||||
select CPU_COPY_V6 if MMU
|
||||
select CPU_PABRT_V6
|
||||
select CPU_TLB_V6 if MMU
|
||||
|
||||
# ARMv6k
|
||||
@ -371,12 +371,12 @@ config CPU_V6K
|
||||
select CPU_32v6
|
||||
select CPU_32v6K
|
||||
select CPU_ABRT_EV6
|
||||
select CPU_PABRT_V6
|
||||
select CPU_CACHE_V6
|
||||
select CPU_CACHE_VIPT
|
||||
select CPU_COPY_V6 if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_HAS_ASID if MMU
|
||||
select CPU_COPY_V6 if MMU
|
||||
select CPU_PABRT_V6
|
||||
select CPU_TLB_V6 if MMU
|
||||
|
||||
# ARMv7
|
||||
@ -385,44 +385,44 @@ config CPU_V7
|
||||
select CPU_32v6K
|
||||
select CPU_32v7
|
||||
select CPU_ABRT_EV7
|
||||
select CPU_PABRT_V7
|
||||
select CPU_CACHE_V7
|
||||
select CPU_CACHE_VIPT
|
||||
select CPU_COPY_V6 if MMU
|
||||
select CPU_CP15_MMU
|
||||
select CPU_HAS_ASID if MMU
|
||||
select CPU_COPY_V6 if MMU
|
||||
select CPU_PABRT_V7
|
||||
select CPU_TLB_V7 if MMU
|
||||
|
||||
# Figure out what processor architecture version we should be using.
|
||||
# This defines the compiler instruction set which depends on the machine type.
|
||||
config CPU_32v3
|
||||
bool
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select CPU_USE_DOMAINS if MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
|
||||
config CPU_32v4
|
||||
bool
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select CPU_USE_DOMAINS if MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
|
||||
config CPU_32v4T
|
||||
bool
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select CPU_USE_DOMAINS if MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
|
||||
config CPU_32v5
|
||||
bool
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select CPU_USE_DOMAINS if MMU
|
||||
select NEEDS_SYSCALL_FOR_CMPXCHG if SMP
|
||||
select TLS_REG_EMUL if SMP || !MMU
|
||||
|
||||
config CPU_32v6
|
||||
bool
|
||||
select TLS_REG_EMUL if !CPU_32v6K && !MMU
|
||||
select CPU_USE_DOMAINS if CPU_V6 && MMU
|
||||
select TLS_REG_EMUL if !CPU_32v6K && !MMU
|
||||
|
||||
config CPU_32v6K
|
||||
bool
|
||||
@ -644,8 +644,8 @@ config ARM_VIRT_EXT
|
||||
config SWP_EMULATE
|
||||
bool "Emulate SWP/SWPB instructions"
|
||||
depends on !CPU_USE_DOMAINS && CPU_V7
|
||||
select HAVE_PROC_CPU if PROC_FS
|
||||
default y if SMP
|
||||
select HAVE_PROC_CPU if PROC_FS
|
||||
help
|
||||
ARMv6 architecture deprecates use of the SWP/SWPB instructions.
|
||||
ARMv7 multiprocessing extensions introduce the ability to disable
|
||||
|
||||
@ -10,16 +10,16 @@ choice
|
||||
|
||||
config ARCH_IMX_V4_V5
|
||||
bool "i.MX1, i.MX21, i.MX25, i.MX27"
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
help
|
||||
This enables support for systems based on the Freescale i.MX ARMv4
|
||||
and ARMv5 SoCs
|
||||
|
||||
config ARCH_IMX_V6_V7
|
||||
bool "i.MX3, i.MX5, i.MX6"
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
help
|
||||
This enables support for systems based on the Freescale i.MX3, i.MX5
|
||||
|
||||
@ -3,8 +3,8 @@ config IMX_HAVE_PLATFORM_FEC
|
||||
default y if ARCH_MX25 || SOC_IMX27 || SOC_IMX35 || SOC_IMX50 || SOC_IMX51 || SOC_IMX53
|
||||
|
||||
config IMX_HAVE_PLATFORM_FLEXCAN
|
||||
select HAVE_CAN_FLEXCAN if CAN
|
||||
bool
|
||||
select HAVE_CAN_FLEXCAN if CAN
|
||||
|
||||
config IMX_HAVE_PLATFORM_FSL_USB2_UDC
|
||||
bool
|
||||
|
||||
@ -5,8 +5,8 @@
|
||||
config PLAT_NOMADIK
|
||||
bool
|
||||
depends on ARCH_NOMADIK || ARCH_U8500
|
||||
select CLKSRC_MMIO
|
||||
default y
|
||||
select CLKSRC_MMIO
|
||||
help
|
||||
Common platform code for Nomadik and other ST-Ericsson
|
||||
platforms.
|
||||
|
||||
@ -14,10 +14,10 @@ config ARCH_OMAP1
|
||||
select CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
select GENERIC_IRQ_CHIP
|
||||
select IRQ_DOMAIN
|
||||
select HAVE_IDE
|
||||
select NEED_MACH_MEMORY_H
|
||||
select IRQ_DOMAIN
|
||||
select NEED_MACH_IO_H if PCCARD
|
||||
select NEED_MACH_MEMORY_H
|
||||
help
|
||||
"Systems based on omap7xx, omap15xx or omap16xx"
|
||||
|
||||
@ -25,10 +25,10 @@ config ARCH_OMAP2PLUS
|
||||
bool "TI OMAP2/3/4"
|
||||
select CLKDEV_LOOKUP
|
||||
select GENERIC_IRQ_CHIP
|
||||
select SPARSE_IRQ
|
||||
select OMAP_DM_TIMER
|
||||
select USE_OF
|
||||
select PROC_DEVICETREE if PROC_FS
|
||||
select SPARSE_IRQ
|
||||
select USE_OF
|
||||
help
|
||||
"Systems based on OMAP2, OMAP3, OMAP4 or OMAP5"
|
||||
|
||||
@ -43,8 +43,8 @@ config OMAP_DEBUG_DEVICES
|
||||
|
||||
config OMAP_DEBUG_LEDS
|
||||
def_bool y if NEW_LEDS
|
||||
select LEDS_CLASS
|
||||
depends on OMAP_DEBUG_DEVICES
|
||||
select LEDS_CLASS
|
||||
|
||||
config POWER_AVS_OMAP
|
||||
bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
|
||||
|
||||
@ -6,8 +6,8 @@ config PLAT_S3C24XX
|
||||
bool
|
||||
depends on ARCH_S3C24XX
|
||||
default y
|
||||
select NO_IOPORT
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select NO_IOPORT
|
||||
select S3C_DEV_NAND
|
||||
help
|
||||
Base platform code for any Samsung S3C24XX device
|
||||
|
||||
@ -7,9 +7,9 @@
|
||||
config PLAT_SAMSUNG
|
||||
bool
|
||||
depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
|
||||
select NO_IOPORT
|
||||
select GENERIC_IRQ_CHIP
|
||||
default y
|
||||
select GENERIC_IRQ_CHIP
|
||||
select NO_IOPORT
|
||||
help
|
||||
Base platform code for all Samsung SoC based systems
|
||||
|
||||
@ -17,16 +17,16 @@ config PLAT_S5P
|
||||
bool
|
||||
depends on (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
|
||||
default y
|
||||
select ARM_VIC if !ARCH_EXYNOS
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_GIC if ARCH_EXYNOS
|
||||
select ARM_VIC if !ARCH_EXYNOS
|
||||
select GIC_NON_BANKED if ARCH_EXYNOS4
|
||||
select NO_IOPORT
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select PLAT_SAMSUNG
|
||||
select S3C_GPIO_TRACK
|
||||
select S5P_GPIO_DRVSTR
|
||||
select SAMSUNG_GPIOLIB_4BIT
|
||||
select PLAT_SAMSUNG
|
||||
select SAMSUNG_CLKSRC
|
||||
select SAMSUNG_GPIOLIB_4BIT
|
||||
select SAMSUNG_IRQ_VIC_TIMER
|
||||
help
|
||||
Base platform code for Samsung's S5P series SoC.
|
||||
@ -423,10 +423,10 @@ config S3C_DMA
|
||||
|
||||
config SAMSUNG_DMADEV
|
||||
bool
|
||||
select ARM_AMBA
|
||||
select DMADEVICES
|
||||
select PL330_DMA if (ARCH_EXYNOS5 || ARCH_EXYNOS4 || CPU_S5PV210 || CPU_S5PC100 || \
|
||||
CPU_S5P6450 || CPU_S5P6440)
|
||||
select ARM_AMBA
|
||||
help
|
||||
Use DMA device engine for PL330 DMAC.
|
||||
|
||||
|
||||
@ -12,10 +12,10 @@ config ARCH_SPEAR13XX
|
||||
bool "ST SPEAr13xx with Device Tree"
|
||||
select ARM_GIC
|
||||
select CPU_V7
|
||||
select USE_OF
|
||||
select HAVE_SMP
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
select PINCTRL
|
||||
select USE_OF
|
||||
help
|
||||
Supports for ARM's SPEAR13XX family
|
||||
|
||||
@ -23,8 +23,8 @@ config ARCH_SPEAR3XX
|
||||
bool "ST SPEAr3xx with Device Tree"
|
||||
select ARM_VIC
|
||||
select CPU_ARM926T
|
||||
select USE_OF
|
||||
select PINCTRL
|
||||
select USE_OF
|
||||
help
|
||||
Supports for ARM's SPEAR3XX family
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user