mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-24 21:24:00 +08:00
wil6210: tuning rings size
Tuning rings size for performance optimization. Increasing Tx ring size, allows buffering more packets for HW, thus eliminating idle periods which were observed with smaller ring at high throughput, because HW was fetching packets faster than driver was filling them into the TX ring. Rx ring was similarly increased to avoid same problems in Rx. Signed-off-by: Vladimir Shulman <qca_shulmanv@qca.qualcomm.com> Signed-off-by: Vladimir Kondratiev <qca_vkondrat@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
parent
f1871cd950
commit
3baedd9167
@ -45,8 +45,8 @@ static inline u32 WIL_GET_BITS(u32 x, int b0, int b1)
|
|||||||
#define WIL6210_MEM_SIZE (2*1024*1024UL)
|
#define WIL6210_MEM_SIZE (2*1024*1024UL)
|
||||||
|
|
||||||
#define WIL_TX_Q_LEN_DEFAULT (4000)
|
#define WIL_TX_Q_LEN_DEFAULT (4000)
|
||||||
#define WIL_RX_RING_SIZE_ORDER_DEFAULT (9)
|
#define WIL_RX_RING_SIZE_ORDER_DEFAULT (10)
|
||||||
#define WIL_TX_RING_SIZE_ORDER_DEFAULT (9)
|
#define WIL_TX_RING_SIZE_ORDER_DEFAULT (10)
|
||||||
/* limit ring size in range [32..32k] */
|
/* limit ring size in range [32..32k] */
|
||||||
#define WIL_RING_SIZE_ORDER_MIN (5)
|
#define WIL_RING_SIZE_ORDER_MIN (5)
|
||||||
#define WIL_RING_SIZE_ORDER_MAX (15)
|
#define WIL_RING_SIZE_ORDER_MAX (15)
|
||||||
|
Loading…
Reference in New Issue
Block a user