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Samsung mach/soc changes for v4.18
1. Remove at24_platform_data in S3C2440. 2. Fix invalid SPDX identifier. 3. Remove Exynos5440 entirely. 4. Cleanups. 5. Remove static mapping of SCU SFR and rely on DTS. -----BEGIN PGP SIGNATURE----- iQItBAABCAAXBQJa+FtDEBxrcnprQGtlcm5lbC5vcmcACgkQwTdm5oaLg9eiQQ/9 F0xtEfE1EcCqwA67r3+vOZLBrRxX7+g1PLHDw7Q0pYrWVGdg6xNAG3xZXn5xSLv+ gJgRg8WDaNULMsPvHk8EwEkM4VhH1BIq0m2bum2AvuNhn/FXXNj4EaNOpODdAOkM 5RsCQPr0/zK3ufPvSInVlyHZpbeEF/Qn40GLEWCJ7m74rKSUlgALW8CypIJLU8Dv vc6w8fYfciLPOLCJXDWJGqMzPgXs+ATpoJXnAyvxlzpvPpKXWAk/8nFDnbNO+y2e LtnDZKAHPchx0OT/zrOIT339+qDal9UQg2m721H6DVb9tx+hAC42XELbYB3e7HhC 172BmR6Wz0Uz1pB6wWHmkkE4NbHle+gVurcYqSNO60U3OzZ7Ffui0NvlNsHn7nHS +AcpDfhu7AGs8VFcMKXb+FKxMi4oeRbhHU4yZfTt/jjaq1MqPFXW91bmEmtmqcP2 /frFdSdxBUVHodEYFuTKw8wSSHZpvk3PdcFOw+1IOaO59Bh452kN6wsOsV0xaf1a xkebzsQSSJrQGLciCKAo/w/rul1vIly4Gj+R6Rk35HV56SuXHccgbwnnkO1B7XnM 1XLVGuHfZeJGq1F5YiHe1E+KMvPWxHbffQhjSsvvfse9bHhEevP8h0ITIB1XaR/7 ZFp1IEUGI1ewjBQ2aVBJfkALy1uo1FNrFXGvZdd8RMk= =na25 -----END PGP SIGNATURE----- Merge tag 'samsung-soc-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into next/soc Samsung mach/soc changes for v4.18 1. Remove at24_platform_data in S3C2440. 2. Fix invalid SPDX identifier. 3. Remove Exynos5440 entirely. 4. Cleanups. 5. Remove static mapping of SCU SFR and rely on DTS. * tag 'samsung-soc-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: exynos: Remove unused soc_is_exynos{4,5} ARM: exynos: Remove static mapping of SCU SFR ARM: exynos: no need to select ARCH_HAS_BANDGAP any longer ARM: exynos: Remove support for Exynos5440 ARM: s3c24xx: Fix invalid SPDX identifier ARM: samsung: simplify getting .drvdata ARM: s3c24xx: mini2440: Use device properties for at24 eeprom Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
3a19f20c5a
@ -8,7 +8,6 @@
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menuconfig ARCH_EXYNOS
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bool "Samsung EXYNOS"
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depends on ARCH_MULTI_V7
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select ARCH_HAS_BANDGAP
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select ARCH_HAS_HOLES_MEMORYMODEL
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select ARCH_SUPPORTS_BIG_ENDIAN
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select ARM_AMBA
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@ -108,18 +107,6 @@ config SOC_EXYNOS5420
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default y
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depends on ARCH_EXYNOS5
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config SOC_EXYNOS5440
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bool "SAMSUNG EXYNOS5440"
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default y
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depends on ARCH_EXYNOS5
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select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
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select HAVE_ARM_ARCH_TIMER
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select AUTO_ZRELADDR
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select PINCTRL_EXYNOS5440
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select PM_OPP
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help
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Enable EXYNOS5440 SoC support
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config SOC_EXYNOS5800
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bool "SAMSUNG EXYNOS5800"
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default y
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@ -21,7 +21,6 @@
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#define EXYNOS5250_SOC_ID 0x43520000
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#define EXYNOS5410_SOC_ID 0xE5410000
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#define EXYNOS5420_SOC_ID 0xE5420000
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#define EXYNOS5440_SOC_ID 0xE5440000
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#define EXYNOS5800_SOC_ID 0xE5422000
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#define EXYNOS5_SOC_MASK 0xFFFFF000
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@ -39,7 +38,6 @@ IS_SAMSUNG_CPU(exynos4412, EXYNOS4412_CPU_ID, EXYNOS4_CPU_MASK)
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IS_SAMSUNG_CPU(exynos5250, EXYNOS5250_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5410, EXYNOS5410_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5420, EXYNOS5420_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5440, EXYNOS5440_SOC_ID, EXYNOS5_SOC_MASK)
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IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
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#if defined(CONFIG_SOC_EXYNOS3250)
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@ -82,22 +80,12 @@ IS_SAMSUNG_CPU(exynos5800, EXYNOS5800_SOC_ID, EXYNOS5_SOC_MASK)
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# define soc_is_exynos5420() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS5440)
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# define soc_is_exynos5440() is_samsung_exynos5440()
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#else
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# define soc_is_exynos5440() 0
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#endif
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#if defined(CONFIG_SOC_EXYNOS5800)
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# define soc_is_exynos5800() is_samsung_exynos5800()
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#else
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# define soc_is_exynos5800() 0
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#endif
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#define soc_is_exynos4() (soc_is_exynos4210() || soc_is_exynos4412())
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#define soc_is_exynos5() (soc_is_exynos5250() || soc_is_exynos5410() || \
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soc_is_exynos5420() || soc_is_exynos5800())
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extern u32 cp15_save_diag;
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extern u32 cp15_save_power;
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@ -149,6 +137,11 @@ extern void exynos_cpu_restore_register(void);
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extern void exynos_pm_central_suspend(void);
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extern int exynos_pm_central_resume(void);
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extern void exynos_enter_aftr(void);
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#ifdef CONFIG_SMP
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extern void exynos_scu_enable(void);
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#else
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static inline void exynos_scu_enable(void) { }
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#endif
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extern struct cpuidle_exynos_data cpuidle_coupled_exynos_data;
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@ -24,15 +24,6 @@
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#include "common.h"
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static struct map_desc exynos4_iodesc[] __initdata = {
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{
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.virtual = (unsigned long)S5P_VA_COREPERI_BASE,
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.pfn = __phys_to_pfn(EXYNOS4_PA_COREPERI),
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.length = SZ_8K,
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.type = MT_DEVICE,
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},
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};
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static struct platform_device exynos_cpuidle = {
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.name = "exynos_cpuidle",
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#ifdef CONFIG_ARM_EXYNOS_CPUIDLE
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@ -63,15 +54,6 @@ void __init exynos_sysram_init(void)
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}
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}
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static void __init exynos_init_late(void)
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{
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if (of_machine_is_compatible("samsung,exynos5440"))
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/* to be supported later */
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return;
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exynos_pm_init();
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}
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static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
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int depth, void *data)
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{
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@ -79,8 +61,7 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
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const __be32 *reg;
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int len;
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if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid") &&
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!of_flat_dt_is_compatible(node, "samsung,exynos5440-clock"))
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if (!of_flat_dt_is_compatible(node, "samsung,exynos4210-chipid"))
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return 0;
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reg = of_get_flat_dt_prop(node, "reg", &len);
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@ -95,17 +76,6 @@ static int __init exynos_fdt_map_chipid(unsigned long node, const char *uname,
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return 1;
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}
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/*
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* exynos_map_io
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*
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* register the standard cpu IO areas
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*/
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static void __init exynos_map_io(void)
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{
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if (soc_is_exynos4())
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iotable_init(exynos4_iodesc, ARRAY_SIZE(exynos4_iodesc));
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}
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static void __init exynos_init_io(void)
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{
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debug_ll_io_init();
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@ -114,8 +84,6 @@ static void __init exynos_init_io(void)
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/* detect cpu id and rev. */
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s5p_init_cpu(S5P_VA_CHIPID);
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exynos_map_io();
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}
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/*
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@ -209,7 +177,6 @@ static char const *const exynos_dt_compat[] __initconst = {
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"samsung,exynos5250",
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"samsung,exynos5260",
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"samsung,exynos5420",
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"samsung,exynos5440",
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NULL
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};
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@ -232,7 +199,7 @@ DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)")
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.init_early = exynos_firmware_init,
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.init_irq = exynos_init_irq,
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.init_machine = exynos_dt_machine_init,
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.init_late = exynos_init_late,
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.init_late = exynos_pm_init,
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.dt_compat = exynos_dt_compat,
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.dt_fixup = exynos_dt_fixup,
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MACHINE_END
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@ -15,6 +15,4 @@
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#define EXYNOS_PA_CHIPID 0x10000000
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#define EXYNOS4_PA_COREPERI 0x10500000
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#endif /* __ASM_ARCH_MAP_H */
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@ -163,6 +163,26 @@ int exynos_cluster_power_state(int cluster)
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S5P_CORE_LOCAL_PWR_EN);
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}
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/**
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* exynos_scu_enable : enables SCU for Cortex-A9 based system
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*/
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void exynos_scu_enable(void)
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{
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struct device_node *np;
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static void __iomem *scu_base;
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if (!scu_base) {
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np = of_find_compatible_node(NULL, NULL, "arm,cortex-a9-scu");
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if (np) {
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scu_base = of_iomap(np, 0);
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of_node_put(np);
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} else {
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scu_base = ioremap(scu_a9_get_base(), SZ_4K);
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}
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}
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scu_enable(scu_base);
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}
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static void __iomem *cpu_boot_reg_base(void)
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{
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if (soc_is_exynos4210() && samsung_rev() == EXYNOS4210_REV_1_1)
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@ -219,11 +239,6 @@ static void write_pen_release(int val)
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sync_cache_w(&pen_release);
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}
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static void __iomem *scu_base_addr(void)
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{
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return (void __iomem *)(S5P_VA_SCU);
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}
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static DEFINE_SPINLOCK(boot_lock);
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static void exynos_secondary_init(unsigned int cpu)
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@ -389,7 +404,7 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
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exynos_set_delayed_reset_assertion(true);
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if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9)
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scu_enable(scu_base_addr());
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exynos_scu_enable();
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/*
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* Write the address of secondary startup into the
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@ -22,8 +22,6 @@
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#include <asm/suspend.h>
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#include <asm/cacheflush.h>
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#include <mach/map.h>
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#include "common.h"
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static inline void __iomem *exynos_boot_vector_addr(void)
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@ -172,7 +170,7 @@ void exynos_enter_aftr(void)
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cpu_suspend(0, exynos_aftr_finisher);
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if (read_cpuid_part() == ARM_CPU_PART_CORTEX_A9) {
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scu_enable(S5P_VA_SCU);
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exynos_scu_enable();
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if (call_firmware_op(resume) == -ENOSYS)
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exynos_cpu_restore_register();
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}
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@ -30,8 +30,6 @@
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#include <asm/smp_scu.h>
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#include <asm/suspend.h>
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#include <mach/map.h>
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#include <plat/pm-common.h>
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#include "common.h"
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@ -401,7 +399,7 @@ static void exynos_pm_resume(void)
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goto early_wakeup;
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if (cpuid == ARM_CPU_PART_CORTEX_A9)
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scu_enable(S5P_VA_SCU);
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exynos_scu_enable();
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if (call_firmware_op(resume) == -ENOSYS
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&& cpuid == ARM_CPU_PART_CORTEX_A9)
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@ -1,4 +1,4 @@
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// SPDX-License-Identifier: GPL-1.0
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// SPDX-License-Identifier: GPL-1.0+
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//
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// Copyright (c) Arnaud Patard <arnaud.patard@rtp-net.org>
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//
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@ -20,7 +20,7 @@
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#include <linux/serial_core.h>
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#include <linux/serial_s3c.h>
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#include <linux/dm9000.h>
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#include <linux/platform_data/at24.h>
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#include <linux/property.h>
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#include <linux/platform_device.h>
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#include <linux/gpio_keys.h>
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#include <linux/i2c.h>
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@ -481,15 +481,15 @@ static struct platform_device mini2440_audio = {
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/*
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* I2C devices
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*/
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static struct at24_platform_data at24c08 = {
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.byte_len = SZ_8K / 8,
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.page_size = 16,
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static const struct property_entry mini2440_at24_properties[] = {
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PROPERTY_ENTRY_U32("pagesize", 16),
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{ }
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};
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static struct i2c_board_info mini2440_i2c_devs[] __initdata = {
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{
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I2C_BOARD_INFO("24c08", 0x50),
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.platform_data = &at24c08,
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.properties = mini2440_at24_properties,
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},
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};
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@ -413,8 +413,7 @@ static int s3c_adc_remove(struct platform_device *pdev)
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#ifdef CONFIG_PM
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static int s3c_adc_suspend(struct device *dev)
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{
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struct platform_device *pdev = to_platform_device(dev);
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struct adc_device *adc = platform_get_drvdata(pdev);
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struct adc_device *adc = dev_get_drvdata(dev);
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unsigned long flags;
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u32 con;
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@ -11,10 +11,6 @@
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#define S5P_VA_CHIPID S3C_ADDR(0x02000000)
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#define S5P_VA_COREPERI_BASE S3C_ADDR(0x02800000)
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#define S5P_VA_COREPERI(x) (S5P_VA_COREPERI_BASE + (x))
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#define S5P_VA_SCU S5P_VA_COREPERI(0x0)
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#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000))
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#define VA_VIC0 VA_VIC(0)
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#define VA_VIC1 VA_VIC(1)
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