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x86/pci/intel_mid_pci: Work around for IRQ0 assignment
On Intel Tangier the MMC host controller is wired up to irq 0. But
several other devices have irq 0 associated as well due to a bogus PCI
configuration.
The first initialized driver will acquire irq 0 and make it
unavailable for other devices. If the sdhci driver is not the first
one it will fail to acquire the interrupt and therefor be non
functional.
Add a quirk to the pci irq enable function which denies irq 0 to
anything else than the MMC host controller driver on Tangier
platforms.
Fixes: 90b9aacf91
(serial: 8250_pci: add Intel Tangier support)
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Link: http://lkml.kernel.org/r/1438161409-4671-2-git-send-email-andriy.shevchenko@linux.intel.com
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
This commit is contained in:
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@ -35,6 +35,9 @@
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#define PCIE_CAP_OFFSET 0x100
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/* Quirks for the listed devices */
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#define PCI_DEVICE_ID_INTEL_MRFL_MMC 0x1190
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/* Fixed BAR fields */
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#define PCIE_VNDR_CAP_ID_FIXED_BAR 0x00 /* Fixed BAR (TBD) */
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#define PCI_FIXED_BAR_0_SIZE 0x04
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@ -214,10 +217,27 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
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if (dev->irq_managed && dev->irq > 0)
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return 0;
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if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)
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switch (intel_mid_identify_cpu()) {
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case INTEL_MID_CPU_CHIP_TANGIER:
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polarity = 0; /* active high */
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else
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/* Special treatment for IRQ0 */
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if (dev->irq == 0) {
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/*
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* TNG has IRQ0 assigned to eMMC controller. But there
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* are also other devices with bogus PCI configuration
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* that have IRQ0 assigned. This check ensures that
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* eMMC gets it.
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*/
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if (dev->device != PCI_DEVICE_ID_INTEL_MRFL_MMC)
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return -EBUSY;
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}
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break;
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default:
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polarity = 1; /* active low */
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break;
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}
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ioapic_set_alloc_attr(&info, dev_to_node(&dev->dev), 1, polarity);
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/*
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