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MIPS: Octeon: Run IPI code with interrupts disabled.

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In mm/slab.c the function do_ccupdate_local requires that interrupts be
disabled.  If they are not, we panic with CONFIG_DEBUG_SLAB.

So we disable interrupts while processing IPIs.  Also these are not shared
irqs, so get rid of the IRQF_SHARED flag.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
David Daney 2009-07-31 14:30:07 -07:00 committed by Ralf Baechle
parent 3d4656d68b
commit 39b3d44624
1 changed files with 2 additions and 2 deletions
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4
arch/mips/cavium-octeon/smp.c
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@ -194,11 +194,11 @@ static void octeon_init_secondary(void)
void octeon_prepare_cpus(unsigned int max_cpus)
{
cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffffffff);
if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_SHARED,
if (request_irq(OCTEON_IRQ_MBOX0, mailbox_interrupt, IRQF_DISABLED,
"mailbox0", mailbox_interrupt)) {
panic("Cannot request_irq(OCTEON_IRQ_MBOX0)\n");
}
if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_SHARED,
if (request_irq(OCTEON_IRQ_MBOX1, mailbox_interrupt, IRQF_DISABLED,
"mailbox1", mailbox_interrupt)) {
panic("Cannot request_irq(OCTEON_IRQ_MBOX1)\n");
}