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drm: bridge: thc63: Restrict modes based on hardware operating frequency
The THC63LVD1024 is restricted to a pixel clock frequency in the range of 8 to 135 MHz. Implement the bridge .mode_valid() operation accordingly. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Andrzej Hajda <a.hajda@samsung.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
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@ -45,6 +45,23 @@ static int thc63_attach(struct drm_bridge *bridge)
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return drm_bridge_attach(bridge->encoder, thc63->next, bridge);
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}
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static enum drm_mode_status thc63_mode_valid(struct drm_bridge *bridge,
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const struct drm_display_mode *mode)
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{
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/*
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* The THC63LVD1024 clock frequency range is 8 to 135 MHz in single-in
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* mode. Note that the limits are different in dual-in, single-out mode,
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* and will need to be adjusted accordingly.
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*/
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if (mode->clock < 8000)
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return MODE_CLOCK_LOW;
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if (mode->clock > 135000)
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return MODE_CLOCK_HIGH;
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return MODE_OK;
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}
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static void thc63_enable(struct drm_bridge *bridge)
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{
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struct thc63_dev *thc63 = to_thc63(bridge);
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@ -77,6 +94,7 @@ static void thc63_disable(struct drm_bridge *bridge)
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static const struct drm_bridge_funcs thc63_bridge_func = {
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.attach = thc63_attach,
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.mode_valid = thc63_mode_valid,
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.enable = thc63_enable,
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.disable = thc63_disable,
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};
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