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drivers: net: xgene-v2: Add DMA descriptor
This patch adds DMA descriptor setup and interrupt enable/disable functions. Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Signed-off-by: Keyur Chudgar <kchudgar@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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74
drivers/net/ethernet/apm/xgene-v2/main.h
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74
drivers/net/ethernet/apm/xgene-v2/main.h
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/*
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* Applied Micro X-Gene SoC Ethernet v2 Driver
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*
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* Copyright (c) 2017, Applied Micro Circuits Corporation
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* Author(s): Iyappan Subramanian <isubramanian@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __XGENE_ENET_V2_MAIN_H__
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#define __XGENE_ENET_V2_MAIN_H__
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/efi.h>
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#include <linux/if_vlan.h>
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#include <linux/irq.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/of_net.h>
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#include <linux/of_mdio.h>
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#include <linux/prefetch.h>
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#include <linux/phy.h>
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#include <net/ip.h>
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#include "mac.h"
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#include "enet.h"
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#include "ring.h"
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#define XGENE_ENET_V2_VERSION "v1.0"
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#define XGENE_ENET_STD_MTU 1536
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#define XGENE_ENET_MIN_FRAME 60
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#define IRQ_ID_SIZE 16
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struct xge_resource {
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void __iomem *base_addr;
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int phy_mode;
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u32 irq;
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};
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struct xge_stats {
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u64 tx_packets;
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u64 tx_bytes;
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u64 rx_packets;
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u64 rx_bytes;
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};
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/* ethernet private data */
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struct xge_pdata {
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struct xge_resource resources;
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struct xge_desc_ring *tx_ring;
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struct xge_desc_ring *rx_ring;
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struct platform_device *pdev;
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char irq_name[IRQ_ID_SIZE];
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struct net_device *ndev;
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struct napi_struct napi;
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struct xge_stats stats;
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int phy_speed;
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u8 nbufs;
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};
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#endif /* __XGENE_ENET_V2_MAIN_H__ */
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81
drivers/net/ethernet/apm/xgene-v2/ring.c
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81
drivers/net/ethernet/apm/xgene-v2/ring.c
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/*
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* Applied Micro X-Gene SoC Ethernet v2 Driver
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*
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* Copyright (c) 2017, Applied Micro Circuits Corporation
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* Author(s): Iyappan Subramanian <isubramanian@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "main.h"
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/* create circular linked list of descriptors */
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void xge_setup_desc(struct xge_desc_ring *ring)
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{
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struct xge_raw_desc *raw_desc;
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dma_addr_t dma_h, next_dma;
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u16 offset;
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int i;
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for (i = 0; i < XGENE_ENET_NUM_DESC; i++) {
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raw_desc = &ring->raw_desc[i];
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offset = (i + 1) & (XGENE_ENET_NUM_DESC - 1);
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next_dma = ring->dma_addr + (offset * XGENE_ENET_DESC_SIZE);
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raw_desc->m0 = cpu_to_le64(SET_BITS(E, 1) |
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SET_BITS(PKT_SIZE, SLOT_EMPTY));
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dma_h = upper_32_bits(next_dma);
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raw_desc->m1 = cpu_to_le64(SET_BITS(NEXT_DESC_ADDRL, next_dma) |
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SET_BITS(NEXT_DESC_ADDRH, dma_h));
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}
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}
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void xge_update_tx_desc_addr(struct xge_pdata *pdata)
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{
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struct xge_desc_ring *ring = pdata->tx_ring;
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dma_addr_t dma_addr = ring->dma_addr;
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xge_wr_csr(pdata, DMATXDESCL, dma_addr);
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xge_wr_csr(pdata, DMATXDESCH, upper_32_bits(dma_addr));
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ring->head = 0;
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ring->tail = 0;
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}
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void xge_update_rx_desc_addr(struct xge_pdata *pdata)
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{
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struct xge_desc_ring *ring = pdata->rx_ring;
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dma_addr_t dma_addr = ring->dma_addr;
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xge_wr_csr(pdata, DMARXDESCL, dma_addr);
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xge_wr_csr(pdata, DMARXDESCH, upper_32_bits(dma_addr));
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ring->head = 0;
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ring->tail = 0;
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}
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void xge_intr_enable(struct xge_pdata *pdata)
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{
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u32 data;
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data = RX_PKT_RCVD | TX_PKT_SENT;
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xge_wr_csr(pdata, DMAINTRMASK, data);
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}
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void xge_intr_disable(struct xge_pdata *pdata)
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{
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xge_wr_csr(pdata, DMAINTRMASK, 0);
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}
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119
drivers/net/ethernet/apm/xgene-v2/ring.h
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119
drivers/net/ethernet/apm/xgene-v2/ring.h
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/*
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* Applied Micro X-Gene SoC Ethernet v2 Driver
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*
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* Copyright (c) 2017, Applied Micro Circuits Corporation
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* Author(s): Iyappan Subramanian <isubramanian@apm.com>
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* Keyur Chudgar <kchudgar@apm.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __XGENE_ENET_V2_RING_H__
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#define __XGENE_ENET_V2_RING_H__
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#define XGENE_ENET_DESC_SIZE 64
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#define XGENE_ENET_NUM_DESC 256
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#define NUM_BUFS 8
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#define SLOT_EMPTY 0xfff
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#define DMATXCTRL 0xa180
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#define DMATXDESCL 0xa184
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#define DMATXDESCH 0xa1a0
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#define DMATXSTATUS 0xa188
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#define DMARXCTRL 0xa18c
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#define DMARXDESCL 0xa190
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#define DMARXDESCH 0xa1a4
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#define DMARXSTATUS 0xa194
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#define DMAINTRMASK 0xa198
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#define DMAINTERRUPT 0xa19c
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#define D_POS 62
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#define D_LEN 2
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#define E_POS 63
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#define E_LEN 1
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#define PKT_ADDRL_POS 0
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#define PKT_ADDRL_LEN 32
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#define PKT_ADDRH_POS 32
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#define PKT_ADDRH_LEN 10
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#define PKT_SIZE_POS 32
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#define PKT_SIZE_LEN 12
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#define NEXT_DESC_ADDRL_POS 0
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#define NEXT_DESC_ADDRL_LEN 32
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#define NEXT_DESC_ADDRH_POS 48
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#define NEXT_DESC_ADDRH_LEN 10
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#define TXPKTCOUNT_POS 16
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#define TXPKTCOUNT_LEN 8
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#define RXPKTCOUNT_POS 16
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#define RXPKTCOUNT_LEN 8
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#define TX_PKT_SENT BIT(0)
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#define TX_BUS_ERROR BIT(3)
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#define RX_PKT_RCVD BIT(4)
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#define RX_BUS_ERROR BIT(7)
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#define RXSTATUS_RXPKTRCVD BIT(0)
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struct xge_raw_desc {
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__le64 m0;
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__le64 m1;
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__le64 m2;
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__le64 m3;
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__le64 m4;
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__le64 m5;
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__le64 m6;
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__le64 m7;
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};
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struct pkt_info {
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struct sk_buff *skb;
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dma_addr_t dma_addr;
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void *pkt_buf;
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};
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/* software context of a descriptor ring */
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struct xge_desc_ring {
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struct net_device *ndev;
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dma_addr_t dma_addr;
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u8 head;
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u8 tail;
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union {
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void *desc_addr;
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struct xge_raw_desc *raw_desc;
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};
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struct pkt_info (*pkt_info);
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};
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static inline u64 xge_set_desc_bits(int pos, int len, u64 val)
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{
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return (val & ((1ULL << len) - 1)) << pos;
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}
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static inline u64 xge_get_desc_bits(int pos, int len, u64 src)
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{
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return (src >> pos) & ((1ULL << len) - 1);
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}
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#define SET_BITS(field, val) \
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xge_set_desc_bits(field ## _POS, field ## _LEN, val)
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#define GET_BITS(field, src) \
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xge_get_desc_bits(field ## _POS, field ## _LEN, src)
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void xge_setup_desc(struct xge_desc_ring *ring);
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void xge_update_tx_desc_addr(struct xge_pdata *pdata);
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void xge_update_rx_desc_addr(struct xge_pdata *pdata);
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void xge_intr_enable(struct xge_pdata *pdata);
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void xge_intr_disable(struct xge_pdata *pdata);
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#endif /* __XGENE_ENET_V2_RING_H__ */
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