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Merge branch 'pci/irq-intx' into next
* pci/irq-intx: PCI: Add pci_irqd_intx_xlate() PCI: Move enum pci_interrupt_pin to linux/pci.h
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commit
37deba4525
@ -14,17 +14,10 @@
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#include <linux/device.h>
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#include <linux/device.h>
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#include <linux/mod_devicetable.h>
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#include <linux/mod_devicetable.h>
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#include <linux/pci.h>
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struct pci_epf;
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struct pci_epf;
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enum pci_interrupt_pin {
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PCI_INTERRUPT_UNKNOWN,
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PCI_INTERRUPT_INTA,
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PCI_INTERRUPT_INTB,
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PCI_INTERRUPT_INTC,
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PCI_INTERRUPT_INTD,
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};
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enum pci_barno {
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enum pci_barno {
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BAR_0,
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BAR_0,
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BAR_1,
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BAR_1,
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@ -102,6 +102,28 @@ enum {
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DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
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DEVICE_COUNT_RESOURCE = PCI_NUM_RESOURCES,
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};
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};
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/**
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* enum pci_interrupt_pin - PCI INTx interrupt values
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* @PCI_INTERRUPT_UNKNOWN: Unknown or unassigned interrupt
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* @PCI_INTERRUPT_INTA: PCI INTA pin
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* @PCI_INTERRUPT_INTB: PCI INTB pin
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* @PCI_INTERRUPT_INTC: PCI INTC pin
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* @PCI_INTERRUPT_INTD: PCI INTD pin
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*
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* Corresponds to values for legacy PCI INTx interrupts, as can be found in the
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* PCI_INTERRUPT_PIN register.
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*/
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enum pci_interrupt_pin {
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PCI_INTERRUPT_UNKNOWN,
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PCI_INTERRUPT_INTA,
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PCI_INTERRUPT_INTB,
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PCI_INTERRUPT_INTC,
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PCI_INTERRUPT_INTD,
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};
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/* The number of legacy PCI INTx interrupts */
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#define PCI_NUM_INTX 4
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/*
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/*
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* pci_power_t values must match the bits in the Capabilities PME_Support
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* pci_power_t values must match the bits in the Capabilities PME_Support
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* and Control/Status PowerState fields in the Power Management capability.
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* and Control/Status PowerState fields in the Power Management capability.
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@ -1394,6 +1416,38 @@ pci_alloc_irq_vectors(struct pci_dev *dev, unsigned int min_vecs,
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NULL);
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NULL);
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}
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}
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/**
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* pci_irqd_intx_xlate() - Translate PCI INTx value to an IRQ domain hwirq
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* @d: the INTx IRQ domain
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* @node: the DT node for the device whose interrupt we're translating
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* @intspec: the interrupt specifier data from the DT
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* @intsize: the number of entries in @intspec
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* @out_hwirq: pointer at which to write the hwirq number
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* @out_type: pointer at which to write the interrupt type
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*
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* Translate a PCI INTx interrupt number from device tree in the range 1-4, as
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* stored in the standard PCI_INTERRUPT_PIN register, to a value in the range
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* 0-3 suitable for use in a 4 entry IRQ domain. That is, subtract one from the
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* INTx value to obtain the hwirq number.
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*
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* Returns 0 on success, or -EINVAL if the interrupt specifier is out of range.
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*/
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static inline int pci_irqd_intx_xlate(struct irq_domain *d,
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struct device_node *node,
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const u32 *intspec,
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unsigned int intsize,
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unsigned long *out_hwirq,
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unsigned int *out_type)
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{
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const u32 intx = intspec[0];
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if (intx < PCI_INTERRUPT_INTA || intx > PCI_INTERRUPT_INTD)
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return -EINVAL;
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*out_hwirq = intx - PCI_INTERRUPT_INTA;
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return 0;
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}
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#ifdef CONFIG_PCIEPORTBUS
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#ifdef CONFIG_PCIEPORTBUS
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extern bool pcie_ports_disabled;
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extern bool pcie_ports_disabled;
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extern bool pcie_ports_auto;
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extern bool pcie_ports_auto;
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