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davinci: dm365: add NAND support to EVM board
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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@ -20,6 +20,9 @@
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#include <linux/io.h>
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#include <linux/clk.h>
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#include <linux/i2c/at24.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/nand.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -34,10 +37,84 @@
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#include <mach/serial.h>
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#include <mach/common.h>
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#include <mach/mmc.h>
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#include <mach/nand.h>
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#define DM365_ASYNC_EMIF_CONTROL_BASE 0x01d10000
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#define DM365_ASYNC_EMIF_DATA_CE0_BASE 0x02000000
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#define DM365_EVM_PHY_MASK (0x2)
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#define DM365_EVM_MDIO_FREQUENCY (2200000) /* PHY bus frequency */
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/* NOTE: this is geared for the standard config, with a socketed
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* 2 GByte Micron NAND (MT29F16G08FAA) using 128KB sectors. If you
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* swap chips with a different block size, partitioning will
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* need to be changed. This NAND chip MT29F16G08FAA is the default
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* NAND shipped with the Spectrum Digital DM365 EVM
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*/
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#define NAND_BLOCK_SIZE SZ_128K
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static struct mtd_partition davinci_nand_partitions[] = {
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{
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/* UBL (a few copies) plus U-Boot */
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.name = "bootloader",
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.offset = 0,
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.size = 28 * NAND_BLOCK_SIZE,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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}, {
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/* U-Boot environment */
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = 2 * NAND_BLOCK_SIZE,
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.mask_flags = 0,
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}, {
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_4M,
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.mask_flags = 0,
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}, {
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.name = "filesystem1",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_512M,
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.mask_flags = 0,
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}, {
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.name = "filesystem2",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0,
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}
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/* two blocks with bad block table (and mirror) at the end */
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};
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static struct davinci_nand_pdata davinci_nand_data = {
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.mask_chipsel = BIT(14),
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.parts = davinci_nand_partitions,
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.nr_parts = ARRAY_SIZE(davinci_nand_partitions),
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.ecc_mode = NAND_ECC_HW,
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.options = NAND_USE_FLASH_BBT,
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};
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static struct resource davinci_nand_resources[] = {
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{
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.start = DM365_ASYNC_EMIF_DATA_CE0_BASE,
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.end = DM365_ASYNC_EMIF_DATA_CE0_BASE + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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}, {
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.start = DM365_ASYNC_EMIF_CONTROL_BASE,
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.end = DM365_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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static struct platform_device davinci_nand_device = {
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.name = "davinci_nand",
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.id = 0,
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.num_resources = ARRAY_SIZE(davinci_nand_resources),
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.resource = davinci_nand_resources,
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.dev = {
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.platform_data = &davinci_nand_data,
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},
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};
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static struct at24_platform_data eeprom_info = {
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.byte_len = (256*1024) / 8,
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.page_size = 64,
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@ -122,6 +199,10 @@ static void __init evm_init_i2c(void)
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i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
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}
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static struct platform_device *dm365_evm_devices[] __initdata = {
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&davinci_nand_device,
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};
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static struct davinci_uart_config uart_config __initdata = {
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.enabled_uarts = (1 << 0),
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};
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@ -135,6 +216,9 @@ static __init void dm365_evm_init(void)
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{
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struct davinci_soc_info *soc_info = &davinci_soc_info;
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platform_add_devices(dm365_evm_devices,
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ARRAY_SIZE(dm365_evm_devices));
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evm_init_i2c();
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davinci_serial_init(&uart_config);
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