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MIPS: Define & use CP0_EBase bit definitions
Add definitions for the bits & fields in the CP0_EBase register, and use them from a few different places in arch/mips which hardcoded these values. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Jayachandran C <jchandra@broadcom.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13222/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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dc3ee608d6
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arch/mips
@ -676,6 +676,14 @@
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#define MIPS_MAAR_S (_ULCAST_(1) << 1)
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#define MIPS_MAAR_V (_ULCAST_(1) << 0)
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/* EBase bit definitions */
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#define MIPS_EBASE_CPUNUM_SHIFT 0
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#define MIPS_EBASE_CPUNUM (_ULCAST_(0x3ff) << 0)
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#define MIPS_EBASE_WG_SHIFT 11
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#define MIPS_EBASE_WG (_ULCAST_(1) << 11)
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#define MIPS_EBASE_BASE_SHIFT 12
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#define MIPS_EBASE_BASE (~_ULCAST_((1 << MIPS_EBASE_BASE_SHIFT) - 1))
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/* CMGCRBase bit definitions */
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#define MIPS_CMGCRB_BASE 11
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#define MIPS_CMGCRF_BASE (~_ULCAST_((1 << MIPS_CMGCRB_BASE) - 1))
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@ -2104,7 +2112,7 @@ __BUILD_SET_C0(brcm_mode)
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*/
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static inline unsigned int get_ebase_cpunum(void)
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{
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return read_c0_ebase() & 0x3ff;
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return read_c0_ebase() & MIPS_EBASE_CPUNUM;
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}
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#endif /* !__ASSEMBLY__ */
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@ -505,7 +505,8 @@ static int kvm_trap_emul_vcpu_setup(struct kvm_vcpu *vcpu)
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kvm_write_c0_guest_intctl(cop0, 0xFC000000);
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/* Put in vcpu id as CPUNum into Ebase Reg to handle SMP Guests */
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kvm_write_c0_guest_ebase(cop0, KVM_GUEST_KSEG0 | (vcpu_id & 0xFF));
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kvm_write_c0_guest_ebase(cop0, KVM_GUEST_KSEG0 |
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(vcpu_id & MIPS_EBASE_CPUNUM));
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return 0;
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}
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@ -58,7 +58,7 @@ void nlm_node_init(int node)
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nodep->coremask = 1; /* node 0, boot cpu */
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nodep->sysbase = nlm_get_sys_regbase(node);
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nodep->picbase = nlm_get_pic_regbase(node);
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nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1));
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nodep->ebase = read_c0_ebase() & MIPS_EBASE_BASE;
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if (cpu_is_xlp9xx())
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nodep->socbus = xlp9xx_get_socbus(node);
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else
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@ -168,7 +168,7 @@ static void nlm_init_node(void)
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nodep = nlm_current_node();
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nodep->picbase = nlm_mmio_base(NETLOGIC_IO_PIC_OFFSET);
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nodep->ebase = read_c0_ebase() & (~((1 << 12) - 1));
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nodep->ebase = read_c0_ebase() & MIPS_EBASE_BASE;
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spin_lock_init(&nodep->piclock);
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}
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