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microblaze_v8: Selfmodified code
Reviewed-by: Ingo Molnar <mingo@elte.hu> Acked-by: Stephen Neuendorffer <stephen.neuendorffer@xilinx.com> Acked-by: John Linn <john.linn@xilinx.com> Acked-by: John Williams <john.williams@petalogix.com> Signed-off-by: Michal Simek <monstr@monstr.eu>
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arch/microblaze/include/asm/selfmod.h
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arch/microblaze/include/asm/selfmod.h
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/*
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* Copyright (C) 2007-2008 Michal Simek <monstr@monstr.eu>
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef _ASM_MICROBLAZE_SELFMOD_H
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#define _ASM_MICROBLAZE_SELFMOD_H
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/*
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* BARRIER_BASE_ADDR is constant address for selfmod function.
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* do not change this value - selfmod function is in
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* arch/microblaze/kernel/selfmod.c: selfmod_function()
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*
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* last 16 bits is used for storing register offset
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*/
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#define BARRIER_BASE_ADDR 0x1234ff00
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void selfmod_function(const int *arr_fce, const unsigned int base);
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#endif /* _ASM_MICROBLAZE_SELFMOD_H */
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arch/microblaze/kernel/selfmod.c
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arch/microblaze/kernel/selfmod.c
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/*
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* Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
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* Copyright (C) 2009 PetaLogix
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/interrupt.h>
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#include <asm/selfmod.h>
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#undef DEBUG
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#if __GNUC__ > 3
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#error GCC 4 unsupported SELFMOD. Please disable SELFMOD from menuconfig.
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#endif
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#define OPCODE_IMM 0xB0000000
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#define OPCODE_LWI 0xE8000000
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#define OPCODE_LWI_MASK 0xEC000000
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#define OPCODE_RTSD 0xB60F0008 /* return from func: rtsd r15, 8 */
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#define OPCODE_ADDIK 0x30000000
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#define OPCODE_ADDIK_MASK 0xFC000000
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#define IMM_BASE (OPCODE_IMM | (BARRIER_BASE_ADDR >> 16))
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#define LWI_BASE (OPCODE_LWI | (BARRIER_BASE_ADDR & 0x0000ff00))
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#define LWI_BASE_MASK (OPCODE_LWI_MASK | (BARRIER_BASE_ADDR & 0x0000ff00))
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#define ADDIK_BASE (OPCODE_ADDIK | (BARRIER_BASE_ADDR & 0x0000ff00))
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#define ADDIK_BASE_MASK (OPCODE_ADDIK_MASK | (BARRIER_BASE_ADDR & 0x0000ff00))
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#define MODIFY_INSTR { \
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pr_debug("%s: curr instr, (%d):0x%x, next(%d):0x%x\n", \
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__func__, i, addr[i], i + 1, addr[i + 1]); \
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addr[i] = OPCODE_IMM + (base >> 16); \
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/* keep instruction opcode and add only last 16bits */ \
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addr[i + 1] = (addr[i + 1] & 0xffff00ff) + (base & 0xffff); \
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__invalidate_icache(addr[i]); \
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__invalidate_icache(addr[i + 1]); \
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pr_debug("%s: hack instr, (%d):0x%x, next(%d):0x%x\n", \
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__func__, i, addr[i], i + 1, addr[i + 1]); }
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/* NOTE
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* self-modified part of code for improvement of interrupt controller
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* save instruction in interrupt rutine
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*/
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void selfmod_function(const int *arr_fce, const unsigned int base)
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{
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unsigned int flags, i, j, *addr = NULL;
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local_irq_save(flags);
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__disable_icache();
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/* zero terminated array */
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for (j = 0; arr_fce[j] != 0; j++) {
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/* get start address of function */
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addr = (unsigned int *) arr_fce[j];
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pr_debug("%s: func(%d) at 0x%x\n",
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__func__, j, (unsigned int) addr);
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for (i = 0; ; i++) {
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pr_debug("%s: instruction code at %d: 0x%x\n",
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__func__, i, addr[i]);
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if (addr[i] == IMM_BASE) {
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/* detecting of lwi (0xE8) or swi (0xF8) instr
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* I can detect both opcode with one mask */
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if ((addr[i + 1] & LWI_BASE_MASK) == LWI_BASE) {
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MODIFY_INSTR;
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} else /* detection addik for ack */
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if ((addr[i + 1] & ADDIK_BASE_MASK) ==
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ADDIK_BASE) {
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MODIFY_INSTR;
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}
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} else if (addr[i] == OPCODE_RTSD) {
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/* return from function means end of function */
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pr_debug("%s: end of array %d\n", __func__, i);
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break;
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}
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}
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}
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local_irq_restore(flags);
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} /* end of self-modified code */
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