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[MIPS] s/__ASSEMBLER__/__ASSEMBLY__/ for clarity sake.

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Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle 2006-09-25 15:49:49 +01:00
parent e584ade1a6
commit 36396f3c36
4 changed files with 6 additions and 6 deletions
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2
include/asm-mips/hazards.h
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@ -11,7 +11,7 @@
#define _ASM_HAZARDS_H
#ifdef __ASSEMBLER__
#ifdef __ASSEMBLY__
#define ASMMACRO(name, code...) .macro name; code; .endm
#else

2
include/asm-mips/mach-excite/excite.h
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@ -7,7 +7,7 @@
#define EXCITE_CPU_EXT_CLOCK 100000000
#if !defined(__ASSEMBLER__)
#if !defined(__ASSEMBLY__)
void __init excite_kgdb_init(void);
void excite_procfs_init(void);
extern unsigned long memsize;

6
include/asm-mips/sibyte/sb1250_defs.h
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@ -212,7 +212,7 @@
* Note: you'll need to define uint32_t and uint64_t in your headers.
*/
#if !defined(__ASSEMBLER__)
#if !defined(__ASSEMBLY__)
#define _SB_MAKE64(x) ((uint64_t)(x))
#define _SB_MAKE32(x) ((uint32_t)(x))
#else
@ -251,9 +251,9 @@
*/
#if defined(__mips64) && !defined(__ASSEMBLER__)
#if defined(__mips64) && !defined(__ASSEMBLY__)
#define SBWRITECSR(csr,val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
#endif /* __ASSEMBLER__ */
#endif /* __ASSEMBLY__ */
#endif

2
include/asm-mips/sibyte/sb1250_scd.h
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@ -149,7 +149,7 @@
* (For the assembler version, sysrev and dest may be the same register.
* Also, it clobbers AT.)
*/
#ifdef __ASSEMBLER__
#ifdef __ASSEMBLY__
#define SYS_SOC_TYPE(dest, sysrev) \
.set push ; \
.set reorder ; \