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perf tools: Move x86 barrier.h stuff to tools/arch/x86/include/asm/barrier.h
We will need it for atomic.h, so move it from the ad-hoc tools/perf/ place to a tools/ subset of the kernel arch/ hierarchy. Other aches will follow, each in a cset. Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Borislav Petkov <bp@suse.de> Cc: David Ahern <dsahern@gmail.com> Cc: Don Zickus <dzickus@redhat.com> Cc: Frederic Weisbecker <fweisbec@gmail.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Stephane Eranian <eranian@google.com> Link: http://lkml.kernel.org/n/tip-vy6bqmsvm6puibpay2cy4wid@git.kernel.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
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tools/arch/x86/include/asm/barrier.h
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28
tools/arch/x86/include/asm/barrier.h
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#ifndef _TOOLS_LINUX_ASM_X86_BARRIER_H
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#define _TOOLS_LINUX_ASM_X86_BARRIER_H
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/*
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* Copied from the Linux kernel sources, and also moving code
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* out from tools/perf/perf-sys.h so as to make it be located
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* in a place similar as in the kernel sources.
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*
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* Force strict CPU ordering.
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* And yes, this is required on UP too when we're talking
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* to devices.
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*/
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#if defined(__i386__)
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/*
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* Some non-Intel clones support out of order store. wmb() ceases to be a
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* nop for these.
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*/
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#define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#elif defined(__x86_64__)
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#define mb() asm volatile("mfence":::"memory")
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#define rmb() asm volatile("lfence":::"memory")
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#define wmb() asm volatile("sfence" ::: "memory")
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#endif
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#endif /* _TOOLS_LINUX_ASM_X86_BARRIER_H */
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tools/include/asm/barrier.h
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tools/include/asm/barrier.h
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#if defined(__i386__) || defined(__x86_64__)
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#include "../../arch/x86/include/asm/barrier.h"
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#endif
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@ -1,4 +1,5 @@
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tools/perf
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tools/arch/x86/include/asm/barrier.h
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tools/scripts
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tools/build
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tools/lib/traceevent
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@ -6,6 +7,7 @@ tools/lib/api
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tools/lib/symbol/kallsyms.c
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tools/lib/symbol/kallsyms.h
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tools/lib/util/find_next_bit.c
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tools/include/asm/barrier.h
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tools/include/asm/bug.h
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tools/include/asm-generic/bitops/arch_hweight.h
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tools/include/asm-generic/bitops/atomic.h
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@ -6,11 +6,9 @@
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#include <sys/syscall.h>
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#include <linux/types.h>
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#include <linux/perf_event.h>
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#include <asm/barrier.h>
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#if defined(__i386__)
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#define mb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define wmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define rmb() asm volatile("lock; addl $0,0(%%esp)" ::: "memory")
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#define cpu_relax() asm volatile("rep; nop" ::: "memory");
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#define CPUINFO_PROC {"model name"}
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#ifndef __NR_perf_event_open
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@ -25,9 +23,6 @@
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#endif
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#if defined(__x86_64__)
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#define mb() asm volatile("mfence" ::: "memory")
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#define wmb() asm volatile("sfence" ::: "memory")
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#define rmb() asm volatile("lfence" ::: "memory")
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#define cpu_relax() asm volatile("rep; nop" ::: "memory");
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#define CPUINFO_PROC {"model name"}
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#ifndef __NR_perf_event_open
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