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drm/nvd0/disp: move syncs/magic setup to or mode_set
NVIDIA appear to do these around the same place they do the MODE_CTRL methods, and for DP at least we need to bash some extra bits in "syncs" to keep EVO happy. It's a bit of a guess as to the 6/8bpc, but i have no better idea yet. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -634,8 +634,7 @@ nvd0_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
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u32 hactive, hsynce, hbackp, hfrontp, hblanke, hblanks;
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u32 vactive, vsynce, vbackp, vfrontp, vblanke, vblanks;
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u32 vblan2e = 0, vblan2s = 1;
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u32 magic = 0x31ec6000;
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u32 syncs, *push;
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u32 *push;
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int ret;
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hactive = mode->htotal;
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@ -655,15 +654,8 @@ nvd0_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
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vblan2e = vactive + vsynce + vbackp;
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vblan2s = vblan2e + (mode->vdisplay * vscan / ilace);
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vactive = (vactive * 2) + 1;
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magic |= 0x00000001;
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}
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syncs = 0x00000001;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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syncs |= 0x00000008;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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syncs |= 0x00000010;
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ret = nvd0_crtc_swap_fbs(crtc, old_fb);
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if (ret)
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return ret;
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@ -683,9 +675,6 @@ nvd0_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
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evo_data(push, mode->clock * 1000);
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evo_data(push, 0x00200000); /* ??? */
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evo_data(push, mode->clock * 1000);
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evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 2);
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evo_data(push, syncs);
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evo_data(push, magic);
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evo_mthd(push, 0x04d0 + (nv_crtc->index * 0x300), 2);
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evo_data(push, 0x00000311);
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evo_data(push, 0x00000100);
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@ -974,13 +963,26 @@ nvd0_dac_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
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{
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struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
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struct nouveau_crtc *nv_crtc = nouveau_crtc(encoder->crtc);
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u32 *push;
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u32 syncs, magic, *push;
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syncs = 0x00000001;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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syncs |= 0x00000008;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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syncs |= 0x00000010;
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magic = 0x31ec6000 | (nv_crtc->index << 25);
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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magic |= 0x00000001;
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nvd0_dac_dpms(encoder, DRM_MODE_DPMS_ON);
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push = evo_wait(encoder->dev, EVO_MASTER, 4);
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push = evo_wait(encoder->dev, EVO_MASTER, 8);
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if (push) {
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evo_mthd(push, 0x0180 + (nv_encoder->or * 0x20), 2);
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evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 2);
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evo_data(push, syncs);
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evo_data(push, magic);
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evo_mthd(push, 0x0180 + (nv_encoder->or * 0x020), 2);
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evo_data(push, 1 << nv_crtc->index);
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evo_data(push, 0x00ff);
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evo_kick(push, encoder->dev, EVO_MASTER);
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@ -1404,7 +1406,18 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
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struct nouveau_connector *nv_connector;
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struct nvbios *bios = &dev_priv->vbios;
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u32 mode_ctrl = (1 << nv_crtc->index);
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u32 *push, or_config;
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u32 syncs, magic, *push;
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u32 or_config;
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syncs = 0x00000001;
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if (mode->flags & DRM_MODE_FLAG_NHSYNC)
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syncs |= 0x00000008;
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if (mode->flags & DRM_MODE_FLAG_NVSYNC)
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syncs |= 0x00000010;
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magic = 0x31ec6000 | (nv_crtc->index << 25);
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if (mode->flags & DRM_MODE_FLAG_INTERLACE)
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magic |= 0x00000001;
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nv_connector = nouveau_encoder_connector_get(nv_encoder);
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switch (nv_encoder->dcb->type) {
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@ -1454,10 +1467,13 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
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}
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break;
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case OUTPUT_DP:
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if (nv_connector->base.display_info.bpc == 6)
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if (nv_connector->base.display_info.bpc == 6) {
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nv_encoder->dp.datarate = mode->clock * 18 / 8;
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else
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syncs |= 0x00000140;
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} else {
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nv_encoder->dp.datarate = mode->clock * 24 / 8;
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syncs |= 0x00000180;
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}
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if (nv_encoder->dcb->sorconf.link & 1)
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mode_ctrl |= 0x00000800;
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@ -1478,9 +1494,12 @@ nvd0_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *umode,
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nv_encoder->dp.datarate);
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}
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push = evo_wait(dev, EVO_MASTER, 4);
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push = evo_wait(dev, EVO_MASTER, 8);
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if (push) {
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evo_mthd(push, 0x0200 + (nv_encoder->or * 0x20), 2);
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evo_mthd(push, 0x0404 + (nv_crtc->index * 0x300), 2);
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evo_data(push, syncs);
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evo_data(push, magic);
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evo_mthd(push, 0x0200 + (nv_encoder->or * 0x020), 2);
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evo_data(push, mode_ctrl);
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evo_data(push, or_config);
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evo_kick(push, dev, EVO_MASTER);
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