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drm/amdgpu/gfx8: use cached raster config values in csb setup
Simplify the code and properly set the csb for harvest values. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -1140,34 +1140,8 @@ static void gfx_v8_0_get_csb_buffer(struct amdgpu_device *adev,
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buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
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buffer[count++] = cpu_to_le32(mmPA_SC_RASTER_CONFIG -
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PACKET3_SET_CONTEXT_REG_START);
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switch (adev->asic_type) {
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case CHIP_TONGA:
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case CHIP_POLARIS10:
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buffer[count++] = cpu_to_le32(0x16000012);
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buffer[count++] = cpu_to_le32(0x0000002A);
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break;
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case CHIP_POLARIS11:
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buffer[count++] = cpu_to_le32(0x16000012);
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buffer[count++] = cpu_to_le32(0x00000000);
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break;
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case CHIP_FIJI:
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buffer[count++] = cpu_to_le32(0x3a00161a);
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buffer[count++] = cpu_to_le32(0x0000002e);
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break;
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case CHIP_TOPAZ:
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case CHIP_CARRIZO:
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buffer[count++] = cpu_to_le32(0x00000002);
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buffer[count++] = cpu_to_le32(0x00000000);
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break;
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case CHIP_STONEY:
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buffer[count++] = cpu_to_le32(0x00000000);
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buffer[count++] = cpu_to_le32(0x00000000);
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break;
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default:
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buffer[count++] = cpu_to_le32(0x00000000);
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buffer[count++] = cpu_to_le32(0x00000000);
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break;
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}
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buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config);
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buffer[count++] = cpu_to_le32(adev->gfx.config.rb_config[0][0].raster_config_1);
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buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
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buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);
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