renegade-project/linux-next
2
0
Fork 0
mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-23 20:53:53 +08:00
Code

ARM: s3c24xx: make S3C24XX_MISCCR access indirect

Browse Source 
The clk driver uses both a function call into an exported
platform file and a direct register access to a hardcoded
virtual address for accessing the MISCCR register, both
become are a problem for a multiplatform kernel because
of the header file dependency.

Make this an indirect function call through platform data
instead.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20200806182059.2431-5-krzk@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Arnd Bergmann 2020-08-06 20:20:22 +02:00 committed by Krzysztof Kozlowski
parent 4f9f0e0688
commit 346f183cc1
2 changed files with 7 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
arch/arm/mach-s3c24xx/common.c
View File

@ -668,5 +668,8 @@ struct platform_device s3c2410_device_dclk = {
.id = 0,
.num_resources = ARRAY_SIZE(s3c2410_dclk_resource),
.resource = s3c2410_dclk_resource,
.dev = {
.platform_data = s3c2410_modify_misccr,
},
};
#endif

10
drivers/clk/samsung/clk-s3c2410-dclk.c
View File

@ -14,10 +14,6 @@
#include <linux/module.h>
#include "clk.h"
/* legacy access to misccr, until dt conversion is finished */
#include <mach/hardware.h>
#include <mach/regs-gpio.h>
#define MUX_DCLK0 0
#define MUX_DCLK1 1
#define DIV_DCLK0 2
@ -52,6 +48,7 @@ struct s3c24xx_clkout {
struct clk_hw hw;
u32 mask;
u8 shift;
unsigned int (*modify_misccr)(unsigned int clr, unsigned int chg);
};
#define to_s3c24xx_clkout(_hw) container_of(_hw, struct s3c24xx_clkout, hw)
@ -62,7 +59,7 @@ static u8 s3c24xx_clkout_get_parent(struct clk_hw *hw)
int num_parents = clk_hw_get_num_parents(hw);
u32 val;
val = readl_relaxed(S3C24XX_MISCCR) >> clkout->shift;
val = clkout->modify_misccr(0, 0) >> clkout->shift;
val >>= clkout->shift;
val &= clkout->mask;
@ -76,7 +73,7 @@ static int s3c24xx_clkout_set_parent(struct clk_hw *hw, u8 index)
{
struct s3c24xx_clkout *clkout = to_s3c24xx_clkout(hw);
s3c2410_modify_misccr((clkout->mask << clkout->shift),
clkout->modify_misccr((clkout->mask << clkout->shift),
(index << clkout->shift));
return 0;
@ -110,6 +107,7 @@ static struct clk_hw *s3c24xx_register_clkout(struct device *dev,
clkout->shift = shift;
clkout->mask = mask;
clkout->hw.init = &init;
clkout->modify_misccr = dev->platform_data;
ret = clk_hw_register(dev, &clkout->hw);
if (ret)