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ARM: dt: tegra: fix length of pad control and mux registers
The reg property contains <base length> not <base last_offset>. Fix the length values to be length not last_offset. Cc: stable@vger.kernel.org Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -73,8 +73,8 @@
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pinmux: pinmux {
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compatible = "nvidia,tegra30-pinmux";
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reg = <0x70000868 0xd0 /* Pad control registers */
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0x70003000 0x3e0>; /* Mux registers */
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reg = <0x70000868 0xd4 /* Pad control registers */
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0x70003000 0x3e4>; /* Mux registers */
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};
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serial@70006000 {
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