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synced 2024-12-22 20:23:57 +08:00
igb: rename nvm ops
All of the nvm ops have the tag _nvm added to the end which is redundant since all of the calls to the ops have to go through the nvm ops struct anyway. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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312c75aee7
@ -1429,10 +1429,10 @@ static struct e1000_phy_operations e1000_phy_ops_82575 = {
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};
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static struct e1000_nvm_operations e1000_nvm_ops_82575 = {
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.acquire_nvm = igb_acquire_nvm_82575,
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.read_nvm = igb_read_nvm_eerd,
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.release_nvm = igb_release_nvm_82575,
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.write_nvm = igb_write_nvm_spi,
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.acquire = igb_acquire_nvm_82575,
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.read = igb_read_nvm_eerd,
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.release = igb_release_nvm_82575,
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.write = igb_write_nvm_spi,
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};
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const struct e1000_info e1000_82575_info = {
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@ -437,10 +437,10 @@ struct e1000_phy_operations {
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};
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struct e1000_nvm_operations {
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s32 (*acquire_nvm)(struct e1000_hw *);
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s32 (*read_nvm)(struct e1000_hw *, u16, u16, u16 *);
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void (*release_nvm)(struct e1000_hw *);
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s32 (*write_nvm)(struct e1000_hw *, u16, u16, u16 *);
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s32 (*acquire)(struct e1000_hw *);
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s32 (*read)(struct e1000_hw *, u16, u16, u16 *);
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void (*release)(struct e1000_hw *);
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s32 (*write)(struct e1000_hw *, u16, u16, u16 *);
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};
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struct e1000_info {
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@ -135,7 +135,7 @@ s32 igb_check_alt_mac_addr(struct e1000_hw *hw)
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u16 offset, nvm_alt_mac_addr_offset, nvm_data;
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u8 alt_mac_addr[ETH_ALEN];
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ret_val = hw->nvm.ops.read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1,
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ret_val = hw->nvm.ops.read(hw, NVM_ALT_MAC_ADDR_PTR, 1,
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&nvm_alt_mac_addr_offset);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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@ -152,7 +152,7 @@ s32 igb_check_alt_mac_addr(struct e1000_hw *hw)
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for (i = 0; i < ETH_ALEN; i += 2) {
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offset = nvm_alt_mac_addr_offset + (i >> 1);
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ret_val = hw->nvm.ops.read_nvm(hw, offset, 1, &nvm_data);
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ret_val = hw->nvm.ops.read(hw, offset, 1, &nvm_data);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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goto out;
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@ -575,8 +575,7 @@ static s32 igb_set_default_fc(struct e1000_hw *hw)
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* control setting, then the variable hw->fc will
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* be initialized based on a value in the EEPROM.
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*/
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ret_val = hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL2_REG, 1,
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&nvm_data);
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ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL2_REG, 1, &nvm_data);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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@ -1028,7 +1027,7 @@ static s32 igb_valid_led_default(struct e1000_hw *hw, u16 *data)
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{
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s32 ret_val;
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ret_val = hw->nvm.ops.read_nvm(hw, NVM_ID_LED_SETTINGS, 1, data);
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ret_val = hw->nvm.ops.read(hw, NVM_ID_LED_SETTINGS, 1, data);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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goto out;
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@ -419,7 +419,7 @@ s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
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goto out;
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}
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ret_val = hw->nvm.ops.acquire_nvm(hw);
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ret_val = hw->nvm.ops.acquire(hw);
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if (ret_val)
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goto out;
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@ -468,7 +468,7 @@ s32 igb_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
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msleep(10);
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release:
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hw->nvm.ops.release_nvm(hw);
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hw->nvm.ops.release(hw);
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out:
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return ret_val;
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@ -487,14 +487,14 @@ s32 igb_read_part_num(struct e1000_hw *hw, u32 *part_num)
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s32 ret_val;
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u16 nvm_data;
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ret_val = hw->nvm.ops.read_nvm(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
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ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_0, 1, &nvm_data);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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goto out;
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}
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*part_num = (u32)(nvm_data << 16);
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ret_val = hw->nvm.ops.read_nvm(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
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ret_val = hw->nvm.ops.read(hw, NVM_PBA_OFFSET_1, 1, &nvm_data);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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goto out;
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@ -548,7 +548,7 @@ s32 igb_validate_nvm_checksum(struct e1000_hw *hw)
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u16 i, nvm_data;
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for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
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ret_val = hw->nvm.ops.read_nvm(hw, i, 1, &nvm_data);
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ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
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if (ret_val) {
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hw_dbg("NVM Read Error\n");
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goto out;
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@ -581,7 +581,7 @@ s32 igb_update_nvm_checksum(struct e1000_hw *hw)
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u16 i, nvm_data;
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for (i = 0; i < NVM_CHECKSUM_REG; i++) {
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ret_val = hw->nvm.ops.read_nvm(hw, i, 1, &nvm_data);
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ret_val = hw->nvm.ops.read(hw, i, 1, &nvm_data);
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if (ret_val) {
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hw_dbg("NVM Read Error while updating checksum.\n");
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goto out;
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@ -589,7 +589,7 @@ s32 igb_update_nvm_checksum(struct e1000_hw *hw)
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checksum += nvm_data;
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}
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checksum = (u16) NVM_SUM - checksum;
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ret_val = hw->nvm.ops.write_nvm(hw, NVM_CHECKSUM_REG, 1, &checksum);
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ret_val = hw->nvm.ops.write(hw, NVM_CHECKSUM_REG, 1, &checksum);
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if (ret_val)
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hw_dbg("NVM Write Error while updating checksum.\n");
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@ -593,12 +593,12 @@ static int igb_get_eeprom(struct net_device *netdev,
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return -ENOMEM;
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if (hw->nvm.type == e1000_nvm_eeprom_spi)
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ret_val = hw->nvm.ops.read_nvm(hw, first_word,
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ret_val = hw->nvm.ops.read(hw, first_word,
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last_word - first_word + 1,
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eeprom_buff);
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else {
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for (i = 0; i < last_word - first_word + 1; i++) {
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ret_val = hw->nvm.ops.read_nvm(hw, first_word + i, 1,
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ret_val = hw->nvm.ops.read(hw, first_word + i, 1,
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&eeprom_buff[i]);
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if (ret_val)
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break;
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@ -645,14 +645,14 @@ static int igb_set_eeprom(struct net_device *netdev,
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if (eeprom->offset & 1) {
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/* need read/modify/write of first changed EEPROM word */
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/* only the second byte of the word is being modified */
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ret_val = hw->nvm.ops.read_nvm(hw, first_word, 1,
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ret_val = hw->nvm.ops.read(hw, first_word, 1,
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&eeprom_buff[0]);
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ptr++;
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}
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if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
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/* need read/modify/write of last changed EEPROM word */
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/* only the first byte of the word is being modified */
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ret_val = hw->nvm.ops.read_nvm(hw, last_word, 1,
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ret_val = hw->nvm.ops.read(hw, last_word, 1,
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&eeprom_buff[last_word - first_word]);
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}
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@ -665,7 +665,7 @@ static int igb_set_eeprom(struct net_device *netdev,
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for (i = 0; i < last_word - first_word + 1; i++)
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eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
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ret_val = hw->nvm.ops.write_nvm(hw, first_word,
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ret_val = hw->nvm.ops.write(hw, first_word,
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last_word - first_word + 1, eeprom_buff);
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/* Update the checksum over the first part of the EEPROM if needed
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@ -689,7 +689,7 @@ static void igb_get_drvinfo(struct net_device *netdev,
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/* EEPROM image version # is reported as firmware version # for
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* 82575 controllers */
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adapter->hw.nvm.ops.read_nvm(&adapter->hw, 5, 1, &eeprom_data);
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adapter->hw.nvm.ops.read(&adapter->hw, 5, 1, &eeprom_data);
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sprintf(firmware_version, "%d.%d-%d",
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(eeprom_data & 0xF000) >> 12,
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(eeprom_data & 0x0FF0) >> 4,
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@ -1056,7 +1056,7 @@ static int igb_eeprom_test(struct igb_adapter *adapter, u64 *data)
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*data = 0;
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/* Read and add up the contents of the EEPROM */
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for (i = 0; i < (NVM_CHECKSUM_REG + 1); i++) {
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if ((adapter->hw.nvm.ops.read_nvm(&adapter->hw, i, 1, &temp))
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if ((adapter->hw.nvm.ops.read(&adapter->hw, i, 1, &temp))
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< 0) {
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*data = 1;
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break;
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@ -1243,8 +1243,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
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if (hw->bus.func == 0 ||
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hw->device_id == E1000_DEV_ID_82575EB_COPPER)
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hw->nvm.ops.read_nvm(hw, NVM_INIT_CONTROL3_PORT_A, 1,
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&eeprom_data);
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hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
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if (eeprom_data & eeprom_apme_mask)
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adapter->eeprom_wol |= E1000_WUFC_MAG;
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