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ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsi
The A80 has 4 mmc controllers. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -333,6 +333,54 @@
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*/
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*/
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ranges = <0 0 0 0x20000000>;
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ranges = <0 0 0 0x20000000>;
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mmc0: mmc@01c0f000 {
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compatible = "allwinner,sun5i-a13-mmc";
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reg = <0x01c0f000 0x1000>;
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clocks = <&mmc_config_clk 0>, <&mmc0_clk 0>,
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<&mmc0_clk 1>, <&mmc0_clk 2>;
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clock-names = "ahb", "mmc", "output", "sample";
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resets = <&mmc_config_clk 0>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmc1: mmc@01c10000 {
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compatible = "allwinner,sun5i-a13-mmc";
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reg = <0x01c10000 0x1000>;
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clocks = <&mmc_config_clk 1>, <&mmc1_clk 0>,
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<&mmc1_clk 1>, <&mmc1_clk 2>;
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clock-names = "ahb", "mmc", "output", "sample";
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resets = <&mmc_config_clk 1>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmc2: mmc@01c11000 {
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compatible = "allwinner,sun5i-a13-mmc";
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reg = <0x01c11000 0x1000>;
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clocks = <&mmc_config_clk 2>, <&mmc2_clk 0>,
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<&mmc2_clk 1>, <&mmc2_clk 2>;
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clock-names = "ahb", "mmc", "output", "sample";
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resets = <&mmc_config_clk 2>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmc3: mmc@01c12000 {
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compatible = "allwinner,sun5i-a13-mmc";
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reg = <0x01c12000 0x1000>;
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clocks = <&mmc_config_clk 3>, <&mmc3_clk 0>,
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<&mmc3_clk 1>, <&mmc3_clk 2>;
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clock-names = "ahb", "mmc", "output", "sample";
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resets = <&mmc_config_clk 3>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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mmc_config_clk: clk@01c13000 {
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mmc_config_clk: clk@01c13000 {
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compatible = "allwinner,sun9i-a80-mmc-config-clk";
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compatible = "allwinner,sun9i-a80-mmc-config-clk";
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reg = <0x01c13000 0x10>;
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reg = <0x01c13000 0x10>;
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