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MIPS: ath79: add SoC detection code for the QCA955X SoCs
Also add 'soc_is_qca955[68x]' helper functions and a Kconfig symbol for the SoC family. Cc: Rodriguez, Luis <rodrigue@qca.qualcomm.com> Cc: Giori, Kathy <kgiori@qca.qualcomm.com> Cc: QCA Linux Team <qca-linux-team@qca.qualcomm.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/4943/ Signed-off-by: John Crispin <blogic@openwrt.org>
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@ -88,6 +88,10 @@ config SOC_AR934X
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select PCI_AR724X if PCI
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def_bool n
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config SOC_QCA955X
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select USB_ARCH_HAS_EHCI
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def_bool n
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config PCI_AR724X
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def_bool n
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@ -164,13 +164,29 @@ static void __init ath79_detect_sys_type(void)
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rev = id & AR934X_REV_ID_REVISION_MASK;
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break;
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case REV_ID_MAJOR_QCA9556:
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ath79_soc = ATH79_SOC_QCA9556;
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chip = "9556";
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rev = id & QCA955X_REV_ID_REVISION_MASK;
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break;
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case REV_ID_MAJOR_QCA9558:
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ath79_soc = ATH79_SOC_QCA9558;
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chip = "9558";
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rev = id & QCA955X_REV_ID_REVISION_MASK;
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break;
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default:
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panic("ath79: unknown SoC, id:0x%08x", id);
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}
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ath79_soc_rev = rev;
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sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
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if (soc_is_qca955x())
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sprintf(ath79_sys_type, "Qualcomm Atheros QCA%s rev %u",
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chip, rev);
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else
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sprintf(ath79_sys_type, "Atheros AR%s rev %u", chip, rev);
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pr_info("SoC: %s\n", ath79_sys_type);
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}
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@ -392,6 +392,8 @@
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#define AR934X_REV_ID_REVISION_MASK 0xf
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#define QCA955X_REV_ID_REVISION_MASK 0xf
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/*
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* SPI block
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*/
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@ -32,6 +32,8 @@ enum ath79_soc_type {
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ATH79_SOC_AR9341,
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ATH79_SOC_AR9342,
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ATH79_SOC_AR9344,
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ATH79_SOC_QCA9556,
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ATH79_SOC_QCA9558,
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};
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extern enum ath79_soc_type ath79_soc;
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@ -98,6 +100,21 @@ static inline int soc_is_ar934x(void)
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return soc_is_ar9341() || soc_is_ar9342() || soc_is_ar9344();
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}
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static inline int soc_is_qca9556(void)
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{
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return ath79_soc == ATH79_SOC_QCA9556;
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}
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static inline int soc_is_qca9558(void)
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{
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return ath79_soc == ATH79_SOC_QCA9558;
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}
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static inline int soc_is_qca955x(void)
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{
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return soc_is_qca9556() || soc_is_qca9558();
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}
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extern void __iomem *ath79_ddr_base;
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extern void __iomem *ath79_pll_base;
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extern void __iomem *ath79_reset_base;
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