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serial: at91: make UART support dma and pdc transfers
Because the UART lack of receive timeout register, so we use a timer to trigger data receive. The DBGU is regarded as UART. Signed-off-by: Elen Song <elen.song@atmel.com> Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -40,6 +40,7 @@
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#include <linux/atmel_serial.h>
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#include <linux/uaccess.h>
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#include <linux/platform_data/atmel.h>
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#include <linux/timer.h>
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#include <asm/io.h>
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#include <asm/ioctls.h>
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@ -168,6 +169,7 @@ struct atmel_uart_port {
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struct serial_rs485 rs485; /* rs485 settings */
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unsigned int tx_done_mask;
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bool is_usart; /* usart or uart */
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struct timer_list uart_timer; /* uart timer */
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int (*prepare_rx)(struct uart_port *port);
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int (*prepare_tx)(struct uart_port *port);
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void (*schedule_rx)(struct uart_port *port);
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@ -822,6 +824,9 @@ static void atmel_release_rx_dma(struct uart_port *port)
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atmel_port->desc_rx = NULL;
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atmel_port->chan_rx = NULL;
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atmel_port->cookie_rx = -EINVAL;
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if (!atmel_port->is_usart)
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del_timer_sync(&atmel_port->uart_timer);
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}
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static void atmel_rx_from_dma(struct uart_port *port)
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@ -951,6 +956,15 @@ chan_err:
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return -EINVAL;
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}
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static void atmel_uart_timer_callback(unsigned long data)
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{
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struct uart_port *port = (void *)data;
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struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
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tasklet_schedule(&atmel_port->tasklet);
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mod_timer(&atmel_port->uart_timer, jiffies + uart_poll_timeout(port));
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}
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/*
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* receive interrupt handler.
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*/
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@ -1214,6 +1228,9 @@ static void atmel_release_rx_pdc(struct uart_port *port)
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DMA_FROM_DEVICE);
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kfree(pdc->buf);
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}
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if (!atmel_port->is_usart)
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del_timer_sync(&atmel_port->uart_timer);
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}
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static void atmel_rx_from_pdc(struct uart_port *port)
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@ -1575,17 +1592,36 @@ static int atmel_startup(struct uart_port *port)
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if (atmel_use_pdc_rx(port)) {
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/* set UART timeout */
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UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
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UART_PUT_CR(port, ATMEL_US_STTTO);
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if (!atmel_port->is_usart) {
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setup_timer(&atmel_port->uart_timer,
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atmel_uart_timer_callback,
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(unsigned long)port);
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mod_timer(&atmel_port->uart_timer,
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jiffies + uart_poll_timeout(port));
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/* set USART timeout */
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} else {
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UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
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UART_PUT_CR(port, ATMEL_US_STTTO);
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UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
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UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
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}
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/* enable PDC controller */
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UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
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} else if (atmel_use_dma_rx(port)) {
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UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
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UART_PUT_CR(port, ATMEL_US_STTTO);
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/* set UART timeout */
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if (!atmel_port->is_usart) {
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setup_timer(&atmel_port->uart_timer,
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atmel_uart_timer_callback,
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(unsigned long)port);
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mod_timer(&atmel_port->uart_timer,
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jiffies + uart_poll_timeout(port));
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/* set USART timeout */
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} else {
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UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
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UART_PUT_CR(port, ATMEL_US_STTTO);
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UART_PUT_IER(port, ATMEL_US_TIMEOUT);
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UART_PUT_IER(port, ATMEL_US_TIMEOUT);
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}
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} else {
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/* enable receive only */
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UART_PUT_IER(port, ATMEL_US_RXRDY);
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