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clocksource/drivers/tegra: Add verbose definition for 1MHz constant
Convert all 1MHz literals to a verbose constant for better readability. Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -46,6 +46,8 @@
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#define TIMER1_IRQ_IDX 0
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#define TIMER1_IRQ_IDX 0
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#define TIMER10_IRQ_IDX 10
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#define TIMER10_IRQ_IDX 10
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#define TIMER_1MHz 1000000
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static u32 usec_config;
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static u32 usec_config;
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static void __iomem *timer_reg_base;
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static void __iomem *timer_reg_base;
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@ -160,7 +162,7 @@ static unsigned long tegra_delay_timer_read_counter_long(void)
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static struct delay_timer tegra_delay_timer = {
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static struct delay_timer tegra_delay_timer = {
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.read_current_timer = tegra_delay_timer_read_counter_long,
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.read_current_timer = tegra_delay_timer_read_counter_long,
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.freq = 1000000,
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.freq = TIMER_1MHz,
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};
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};
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#endif
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#endif
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@ -226,7 +228,7 @@ static inline unsigned long tegra_rate_for_timer(struct timer_of *to,
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* parent clock.
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* parent clock.
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*/
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*/
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if (tegra20)
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if (tegra20)
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return 1000000;
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return TIMER_1MHz;
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return timer_of_rate(to);
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return timer_of_rate(to);
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}
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}
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@ -315,11 +317,11 @@ static int __init tegra_init_timer(struct device_node *np, bool tegra20,
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}
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}
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}
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}
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sched_clock_register(tegra_read_sched_clock, 32, 1000000);
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sched_clock_register(tegra_read_sched_clock, 32, TIMER_1MHz);
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ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
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ret = clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
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"timer_us", 1000000,
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"timer_us", TIMER_1MHz, 300, 32,
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300, 32, clocksource_mmio_readl_up);
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clocksource_mmio_readl_up);
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if (ret)
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if (ret)
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pr_err("failed to register clocksource: %d\n", ret);
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pr_err("failed to register clocksource: %d\n", ret);
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