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PCI: Align bridge I/O windows as required by downstream devices & bridges

An upstream bridge's I/O window must be at least as aligned as any
downstream device or bridge requires.  In particular, if the upstream
bridge supports 1K alignment but a downstream bridge requires 4K alignment,
the upstream window must also be 4K aligned.

Therefore, do not reduce the required alignment ("min_align") based on
the upstream bridge's capabilities.

Reported-by: Wei Yang <weiyang@linux.vnet.ibm.com>
Suggested-by: Yinghai Lu <yinghai@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Bjorn Helgaas 2013-08-05 16:15:10 -06:00
parent 11251a869e
commit 2d1d66780e

View File

@ -749,12 +749,12 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
struct resource *b_res = find_free_bus_resource(bus, IORESOURCE_IO);
resource_size_t size = 0, size0 = 0, size1 = 0;
resource_size_t children_add_size = 0;
resource_size_t min_align, io_align, align;
resource_size_t min_align, align;
if (!b_res)
return;
io_align = min_align = window_alignment(bus, IORESOURCE_IO);
min_align = window_alignment(bus, IORESOURCE_IO);
list_for_each_entry(dev, &bus->devices, bus_list) {
int i;
@ -781,9 +781,6 @@ static void pbus_size_io(struct pci_bus *bus, resource_size_t min_size,
}
}
if (min_align > io_align)
min_align = io_align;
size0 = calculate_iosize(size, min_size, size1,
resource_size(b_res), min_align);
if (children_add_size > add_size)