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x86/events/intel/ds: Fix bts_interrupt_threshold alignment
Markus reported that BTS is sporadically missing the tail of the trace
in the perf_event data buffer: [decode error (1): instruction overflow]
shown in GDB; and bisected it to the conversion of debug_store to PTI.
A little "optimization" crept into alloc_bts_buffer(), which mistakenly
placed bts_interrupt_threshold away from the 24-byte record boundary.
Intel SDM Vol 3B 17.4.9 says "This address must point to an offset from
the BTS buffer base that is a multiple of the BTS record size."
Revert "max" from a byte count to a record count, to calculate the
bts_interrupt_threshold correctly: which turns out to fix problem seen.
Fixes: c1961a4631
("x86/events/intel/ds: Map debug buffers in cpu_entry_area")
Reported-and-tested-by: Markus T Metzger <markus.t.metzger@intel.com>
Signed-off-by: Hugh Dickins <hughd@google.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Arnaldo Carvalho de Melo <acme@kernel.org>
Cc: Alexander Shishkin <alexander.shishkin@intel.com>
Cc: Andi Kleen <andi.kleen@intel.com>
Cc: Dave Hansen <dave.hansen@intel.com>
Cc: Stephane Eranian <eranian@google.com>
Cc: stable@vger.kernel.org # v4.14+
Link: https://lkml.kernel.org/r/alpine.LSU.2.11.1807141248290.1614@eggly.anvils
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@ -408,9 +408,11 @@ static int alloc_bts_buffer(int cpu)
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ds->bts_buffer_base = (unsigned long) cea;
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ds->bts_buffer_base = (unsigned long) cea;
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ds_update_cea(cea, buffer, BTS_BUFFER_SIZE, PAGE_KERNEL);
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ds_update_cea(cea, buffer, BTS_BUFFER_SIZE, PAGE_KERNEL);
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ds->bts_index = ds->bts_buffer_base;
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ds->bts_index = ds->bts_buffer_base;
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max = BTS_RECORD_SIZE * (BTS_BUFFER_SIZE / BTS_RECORD_SIZE);
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max = BTS_BUFFER_SIZE / BTS_RECORD_SIZE;
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ds->bts_absolute_maximum = ds->bts_buffer_base + max;
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ds->bts_absolute_maximum = ds->bts_buffer_base +
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ds->bts_interrupt_threshold = ds->bts_absolute_maximum - (max / 16);
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max * BTS_RECORD_SIZE;
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ds->bts_interrupt_threshold = ds->bts_absolute_maximum -
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(max / 16) * BTS_RECORD_SIZE;
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return 0;
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return 0;
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}
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}
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