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Merge branch 'pci/host-thunder' into next
* pci/host-thunder: PCI: Avoid slot reset if bridge itself is broken PCI: Avoid bus reset if bridge itself is broken PCI: Mark Cavium CN8xxx to avoid bus reset
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commit
29d0d4411f
@ -4436,6 +4436,10 @@ static bool pci_bus_resetable(struct pci_bus *bus)
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{
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struct pci_dev *dev;
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if (bus->self && (bus->self->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET))
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return false;
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list_for_each_entry(dev, &bus->devices, bus_list) {
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if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET ||
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(dev->subordinate && !pci_bus_resetable(dev->subordinate)))
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@ -4500,6 +4504,10 @@ static bool pci_slot_resetable(struct pci_slot *slot)
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{
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struct pci_dev *dev;
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if (slot->bus->self &&
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(slot->bus->self->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET))
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return false;
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list_for_each_entry(dev, &slot->bus->devices, bus_list) {
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if (!dev->slot || dev->slot != slot)
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continue;
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@ -3365,6 +3365,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0032, quirk_no_bus_reset);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x003c, quirk_no_bus_reset);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATHEROS, 0x0033, quirk_no_bus_reset);
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/*
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* Root port on some Cavium CN8xxx chips do not successfully complete a bus
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* reset when used with certain child devices. After the reset, config
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* accesses to the child may fail.
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*/
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_CAVIUM, 0xa100, quirk_no_bus_reset);
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static void quirk_no_pm_reset(struct pci_dev *dev)
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{
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/*
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