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drm/amdgpu/vcn:Update SPG mode VCN memory control

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Update Static Power Gate  mode VCN memory control

Signed-off-by: James Zhu <James.Zhu@amd.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
James Zhu 2018-10-09 16:40:56 -04:00 committed by Alex Deucher
parent f5c5451fef
commit 298dc39a3a
1 changed files with 6 additions and 7 deletions
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13
drivers/gpu/drm/amd/amdgpu/vcn_v1_0.c
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@ -787,13 +787,12 @@ static int vcn_v1_0_start_spg_mode(struct amdgpu_device *adev)
mdelay(5);
/* initialize VCN memory controller */
WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL,
(0x40 << UVD_LMI_CTRL__WRITE_CLEAN_TIMER__SHIFT) |
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK |
UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK |
UVD_LMI_CTRL__REQ_MODE_MASK |
0x00100000L);
tmp = RREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL);
WREG32_SOC15(UVD, 0, mmUVD_LMI_CTRL, tmp |
UVD_LMI_CTRL__WRITE_CLEAN_TIMER_EN_MASK |
UVD_LMI_CTRL__MASK_MC_URGENT_MASK |
UVD_LMI_CTRL__DATA_COHERENCY_EN_MASK |
UVD_LMI_CTRL__VCPU_DATA_COHERENCY_EN_MASK);
#ifdef __BIG_ENDIAN
/* swap (8 in 32) RB and IB */