mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-21 03:33:59 +08:00
Merge remote-tracking branch 'agust/next' into next
From Anatolij Gustschin: << There are some changes for mpc5121 generic platform code to support mpc5125 SoC and DTS files for ac14xx and MPC5125-TWR boards. >>
This commit is contained in:
Benjamin Herrenschmidt
commit
28bf41a1fe
392
arch/powerpc/boot/dts/ac14xx.dts
Normal file
392
arch/powerpc/boot/dts/ac14xx.dts
Normal file
@ -0,0 +1,392 @@
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/*
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* Device Tree Source for the MPC5121e based ac14xx board
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*
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* Copyright 2012 Anatolij Gustschin <agust@denx.de>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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/include/ "mpc5121.dtsi"
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/ {
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model = "ac14xx";
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compatible = "ifm,ac14xx", "fsl,mpc5121";
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#address-cells = <1>;
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#size-cells = <1>;
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aliases {
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serial0 = &serial0;
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serial1 = &serial7;
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spi4 = &spi4;
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spi5 = &spi5;
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};
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cpus {
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PowerPC,5121@0 {
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timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
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bus-frequency = <160000000>; /* 160 MHz csb bus */
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clock-frequency = <400000000>; /* 400 MHz ppc core */
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};
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};
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memory {
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reg = <0x00000000 0x10000000>; /* 256MB at 0 */
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};
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nfc@40000000 {
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status = "disabled";
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};
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localbus@80000020 {
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ranges = <0x0 0x0 0xfc000000 0x04000000 /* CS0: NOR flash */
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0x1 0x0 0xe0000000 0x00010000 /* CS1: FRAM */
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0x2 0x0 0xe0100000 0x00080000 /* CS2: asi1 */
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0x3 0x0 0xe0300000 0x00020000 /* CS3: comm */
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0x5 0x0 0xe0400000 0x00010000 /* CS5: safety */
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0x6 0x0 0xe0200000 0x00080000>; /* CS6: asi2 */
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flash@0,0 {
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compatible = "cfi-flash";
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reg = <0 0x00000000 0x04000000>;
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#address-cells = <1>;
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#size-cells = <1>;
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bank-width = <2>;
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device-width = <2>;
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partition@0 {
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label = "dtb-kernel-production";
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reg = <0x00000000 0x00400000>;
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};
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partition@1 {
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label = "filesystem-production";
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reg = <0x00400000 0x03400000>;
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};
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partition@2 {
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label = "recovery";
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reg = <0x03800000 0x00700000>;
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};
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partition@3 {
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label = "uboot-code";
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reg = <0x03f00000 0x00040000>;
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};
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partition@4 {
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label = "uboot-env1";
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reg = <0x03f40000 0x00020000>;
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};
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partition@5 {
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label = "uboot-env2";
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reg = <0x03f60000 0x00020000>;
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};
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};
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fram@1,0 {
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compatible = "ifm,ac14xx-fram", "linux,uio-pdrv-genirq";
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reg = <1 0x00000000 0x00010000>;
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};
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asi@2,0 {
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/* masters mapping: CS, CS offset, size */
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reg = <2 0x00000000 0x00080000
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6 0x00000000 0x00080000>;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "ifm,ac14xx-asi-fpga";
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gpios = <
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&gpio_pic 26 0 /* prog */
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&gpio_pic 27 0 /* done */
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&gpio_pic 10 0 /* reset */
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>;
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master@1 {
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interrupts = <20 0x2>;
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interrupt-parent = <&gpio_pic>;
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chipselect = <2 0x00009000 0x00009100>;
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label = "AS-i master 1";
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};
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master@2 {
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interrupts = <21 0x2>;
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interrupt-parent = <&gpio_pic>;
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chipselect = <6 0x00009000 0x00009100>;
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label = "AS-i master 2";
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};
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};
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netx@3,0 {
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compatible = "ifm,netx";
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reg = <0x3 0x00000000 0x00020000>;
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chipselect = <3 0x00101140 0x00203100>;
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interrupts = <17 0x8>;
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gpios = <&gpio_pic 15 0>;
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};
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safety@5,0 {
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compatible = "ifm,safety";
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reg = <0x5 0x00000000 0x00010000>;
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chipselect = <5 0x00009000 0x00009100>;
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interrupts = <22 0x2>;
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interrupt-parent = <&gpio_pic>;
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gpios = <
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&gpio_pic 12 0 /* prog */
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&gpio_pic 11 0 /* done */
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>;
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};
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};
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soc@80000000 {
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clock@f00 {
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compatible = "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
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};
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/*
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* GPIO PIC:
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* interrupts cell = <pin nr, sense>
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* sense == 8: Level, low assertion
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* sense == 2: Edge, high-to-low change
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*/
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gpio_pic: gpio@1100 {
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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sdhc@1500 {
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cd-gpios = <&gpio_pic 23 0>; /* card detect */
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wp-gpios = <&gpio_pic 24 0>; /* write protect */
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wp-inverted; /* WP active high */
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};
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i2c@1700 {
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/* use Fast-mode */
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clock-frequency = <400000>;
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at24@30 {
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compatible = "at24,24c01";
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reg = <0x30>;
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};
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at24@31 {
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compatible = "at24,24c01";
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reg = <0x31>;
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};
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temp@48 {
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compatible = "ad,ad7414";
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reg = <0x48>;
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};
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at24@50 {
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compatible = "at24,24c01";
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reg = <0x50>;
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};
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at24@51 {
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compatible = "at24,24c01";
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reg = <0x51>;
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};
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at24@52 {
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compatible = "at24,24c01";
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reg = <0x52>;
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};
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at24@53 {
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compatible = "at24,24c01";
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reg = <0x53>;
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};
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at24@54 {
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compatible = "at24,24c01";
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reg = <0x54>;
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};
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at24@55 {
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compatible = "at24,24c01";
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reg = <0x55>;
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};
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at24@56 {
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compatible = "at24,24c01";
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reg = <0x56>;
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};
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at24@57 {
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compatible = "at24,24c01";
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reg = <0x57>;
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};
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rtc@68 {
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compatible = "stm,m41t00";
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reg = <0x68>;
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};
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};
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axe_pic: axe-base@2000 {
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compatible = "fsl,mpc5121-axe-base";
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reg = <0x2000 0x100>;
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interrupts = <42 0x8>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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axe-app {
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compatible = "fsl,mpc5121-axe-app";
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interrupt-parent = <&axe_pic>;
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interrupts = <
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/* soft interrupts */
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0 0x0 1 0x0 2 0x0 3 0x0
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4 0x0 5 0x0 6 0x0 7 0x0
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/* fifo interrupts */
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8 0x0 9 0x0 10 0x0 11 0x0
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>;
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};
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display@2100 {
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edid = [00 FF FF FF FF FF FF 00 14 94 00 00 00 00 00 00
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0A 12 01 03 80 1C 23 78 CA 88 FF 94 52 54 8E 27
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1E 4C 50 00 00 00 01 01 01 01 01 01 01 01 01 01
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01 01 01 01 01 01 FB 00 B0 14 00 DC 05 00 08 04
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21 00 1C 23 00 00 00 18 00 00 00 FD 00 38 3C 1F
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3C 01 0A 20 20 20 20 20 20 20 00 00 00 FC 00 45
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54 30 31 38 30 30 33 44 4D 55 0A 0A 00 00 00 10
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00 41 30 30 30 30 30 30 30 30 30 30 30 31 00 D5];
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};
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can@2300 {
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status = "disabled";
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};
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can@2380 {
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status = "disabled";
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};
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viu@2400 {
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status = "disabled";
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};
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mdio@2800 {
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phy0: ethernet-phy@1f {
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compatible = "smsc,lan8700";
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reg = <0x1f>;
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};
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};
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enet: ethernet@2800 {
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phy-handle = <&phy0>;
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};
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usb@3000 {
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status = "disabled";
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};
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usb@4000 {
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status = "disabled";
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};
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/* PSC3 serial port A, aka ttyPSC0 */
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serial0: psc@11300 {
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compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
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fsl,rx-fifo-size = <512>;
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fsl,tx-fifo-size = <512>;
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};
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/* PSC4 in SPI mode */
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spi4: psc@11400 {
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compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
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fsl,rx-fifo-size = <768>;
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fsl,tx-fifo-size = <768>;
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#address-cells = <1>;
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#size-cells = <0>;
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num-cs = <1>;
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cs-gpios = <&gpio_pic 25 0>;
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flash: m25p128@0 {
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compatible = "st,m25p128";
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spi-max-frequency = <20000000>;
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "spi-flash0";
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reg = <0x00000000 0x01000000>;
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};
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};
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};
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/* PSC5 in SPI mode */
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spi5: psc@11500 {
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compatible = "fsl,mpc5121-psc-spi", "fsl,mpc5121-psc";
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fsl,mode = "spi-master";
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fsl,rx-fifo-size = <128>;
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fsl,tx-fifo-size = <128>;
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#address-cells = <1>;
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#size-cells = <0>;
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lcd@0 {
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compatible = "ilitek,ili922x";
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reg = <0>;
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spi-max-frequency = <100000>;
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spi-cpol;
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spi-cpha;
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};
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};
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/* PSC7 serial port C, aka ttyPSC2 */
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serial7: psc@11700 {
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compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
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fsl,rx-fifo-size = <512>;
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fsl,tx-fifo-size = <512>;
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};
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matrix_keypad@0 {
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compatible = "gpio-matrix-keypad";
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debounce-delay-ms = <5>;
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col-scan-delay-us = <1>;
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gpio-activelow;
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col-gpios-binary;
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col-switch-delay-ms = <200>;
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col-gpios = <&gpio_pic 1 0>; /* pin1 */
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row-gpios = <&gpio_pic 2 0 /* pin2 */
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&gpio_pic 3 0 /* pin3 */
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&gpio_pic 4 0>; /* pin4 */
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linux,keymap = <0x0000006e /* FN LEFT */
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0x01000067 /* UP */
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0x02000066 /* FN RIGHT */
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0x00010069 /* LEFT */
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0x0101006a /* DOWN */
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0x0201006c>; /* RIGHT */
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};
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};
|
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leds {
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compatible = "gpio-leds";
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||||
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backlight {
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label = "backlight";
|
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gpios = <&gpio_pic 0 0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
green {
|
||||
label = "green";
|
||||
gpios = <&gpio_pic 18 0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
red {
|
||||
label = "red";
|
||||
gpios = <&gpio_pic 19 0>;
|
||||
default-state = "keep";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -384,7 +384,7 @@
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interrupts = <40 0x8>;
|
||||
};
|
||||
|
||||
dma@14000 {
|
||||
dma0: dma@14000 {
|
||||
compatible = "fsl,mpc5121-dma";
|
||||
reg = <0x14000 0x1800>;
|
||||
interrupts = <65 0x8>;
|
||||
|
||||
@ -13,7 +13,7 @@
|
||||
|
||||
/ {
|
||||
model = "mpc5121ads";
|
||||
compatible = "fsl,mpc5121ads";
|
||||
compatible = "fsl,mpc5121ads", "fsl,mpc5121";
|
||||
|
||||
nfc@40000000 {
|
||||
/*
|
||||
|
||||
233
arch/powerpc/boot/dts/mpc5125twr.dts
Normal file
233
arch/powerpc/boot/dts/mpc5125twr.dts
Normal file
@ -0,0 +1,233 @@
|
||||
/*
|
||||
* STx/Freescale ADS5125 MPC5125 silicon
|
||||
*
|
||||
* Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved.
|
||||
*
|
||||
* Reworked by Matteo Facchinetti (engineering@sirius-es.it)
|
||||
* Copyright (C) 2013 Sirius Electronic Systems
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
/ {
|
||||
model = "mpc5125twr"; // In BSP "mpc5125ads"
|
||||
compatible = "fsl,mpc5125ads", "fsl,mpc5125";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&ipic>;
|
||||
|
||||
aliases {
|
||||
gpio0 = &gpio0;
|
||||
gpio1 = &gpio1;
|
||||
ethernet0 = ð0;
|
||||
};
|
||||
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,5125@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
d-cache-line-size = <0x20>; // 32 bytes
|
||||
i-cache-line-size = <0x20>; // 32 bytes
|
||||
d-cache-size = <0x8000>; // L1, 32K
|
||||
i-cache-size = <0x8000>; // L1, 32K
|
||||
timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
|
||||
bus-frequency = <198000000>; // 198 MHz csb bus
|
||||
clock-frequency = <396000000>; // 396 MHz ppc core
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00000000 0x10000000>; // 256MB at 0
|
||||
};
|
||||
|
||||
sram@30000000 {
|
||||
compatible = "fsl,mpc5121-sram";
|
||||
reg = <0x30000000 0x08000>; // 32K at 0x30000000
|
||||
};
|
||||
|
||||
soc@80000000 {
|
||||
compatible = "fsl,mpc5121-immr";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
ranges = <0x0 0x80000000 0x400000>;
|
||||
reg = <0x80000000 0x400000>;
|
||||
bus-frequency = <66000000>; // 66 MHz ips bus
|
||||
|
||||
// IPIC
|
||||
// interrupts cell = <intr #, sense>
|
||||
// sense values match linux IORESOURCE_IRQ_* defines:
|
||||
// sense == 8: Level, low assertion
|
||||
// sense == 2: Edge, high-to-low change
|
||||
//
|
||||
ipic: interrupt-controller@c00 {
|
||||
compatible = "fsl,mpc5121-ipic", "fsl,ipic";
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <0xc00 0x100>;
|
||||
};
|
||||
|
||||
rtc@a00 { // Real time clock
|
||||
compatible = "fsl,mpc5121-rtc";
|
||||
reg = <0xa00 0x100>;
|
||||
interrupts = <79 0x8 80 0x8>;
|
||||
};
|
||||
|
||||
reset@e00 { // Reset module
|
||||
compatible = "fsl,mpc5125-reset";
|
||||
reg = <0xe00 0x100>;
|
||||
};
|
||||
|
||||
clock@f00 { // Clock control
|
||||
compatible = "fsl,mpc5121-clock";
|
||||
reg = <0xf00 0x100>;
|
||||
};
|
||||
|
||||
pmc@1000{ // Power Management Controller
|
||||
compatible = "fsl,mpc5121-pmc";
|
||||
reg = <0x1000 0x100>;
|
||||
interrupts = <83 0x2>;
|
||||
};
|
||||
|
||||
gpio0: gpio@1100 {
|
||||
compatible = "fsl,mpc5125-gpio";
|
||||
reg = <0x1100 0x080>;
|
||||
interrupts = <78 0x8>;
|
||||
};
|
||||
|
||||
gpio1: gpio@1180 {
|
||||
compatible = "fsl,mpc5125-gpio";
|
||||
reg = <0x1180 0x080>;
|
||||
interrupts = <86 0x8>;
|
||||
};
|
||||
|
||||
can@1300 { // CAN rev.2
|
||||
compatible = "fsl,mpc5121-mscan";
|
||||
interrupts = <12 0x8>;
|
||||
reg = <0x1300 0x80>;
|
||||
};
|
||||
|
||||
can@1380 {
|
||||
compatible = "fsl,mpc5121-mscan";
|
||||
interrupts = <13 0x8>;
|
||||
reg = <0x1380 0x80>;
|
||||
};
|
||||
|
||||
sdhc@1500 {
|
||||
compatible = "fsl,mpc5121-sdhc";
|
||||
interrupts = <8 0x8>;
|
||||
reg = <0x1500 0x100>;
|
||||
};
|
||||
|
||||
i2c@1700 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
|
||||
reg = <0x1700 0x20>;
|
||||
interrupts = <0x9 0x8>;
|
||||
};
|
||||
|
||||
i2c@1720 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
|
||||
reg = <0x1720 0x20>;
|
||||
interrupts = <0xa 0x8>;
|
||||
};
|
||||
|
||||
i2c@1740 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
|
||||
reg = <0x1740 0x20>;
|
||||
interrupts = <0xb 0x8>;
|
||||
};
|
||||
|
||||
i2ccontrol@1760 {
|
||||
compatible = "fsl,mpc5121-i2c-ctrl";
|
||||
reg = <0x1760 0x8>;
|
||||
};
|
||||
|
||||
diu@2100 {
|
||||
compatible = "fsl,mpc5121-diu";
|
||||
reg = <0x2100 0x100>;
|
||||
interrupts = <64 0x8>;
|
||||
};
|
||||
|
||||
mdio@2800 {
|
||||
compatible = "fsl,mpc5121-fec-mdio";
|
||||
reg = <0x2800 0x800>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
eth0: ethernet@2800 {
|
||||
compatible = "fsl,mpc5125-fec";
|
||||
reg = <0x2800 0x800>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <4 0x8>;
|
||||
phy-handle = < &phy0 >;
|
||||
phy-connection-type = "rmii";
|
||||
};
|
||||
|
||||
// IO control
|
||||
ioctl@a000 {
|
||||
compatible = "fsl,mpc5125-ioctl";
|
||||
reg = <0xA000 0x1000>;
|
||||
};
|
||||
|
||||
usb@3000 {
|
||||
compatible = "fsl,mpc5121-usb2-dr";
|
||||
reg = <0x3000 0x400>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <43 0x8>;
|
||||
dr_mode = "host";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
// 5125 PSCs are not 52xx or 5121 PSC compatible
|
||||
// PSC1 uart0 aka ttyPSC0
|
||||
serial@11100 {
|
||||
compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
|
||||
reg = <0x11100 0x100>;
|
||||
interrupts = <40 0x8>;
|
||||
fsl,rx-fifo-size = <16>;
|
||||
fsl,tx-fifo-size = <16>;
|
||||
};
|
||||
|
||||
// PSC9 uart1 aka ttyPSC1
|
||||
serial@11900 {
|
||||
compatible = "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
|
||||
reg = <0x11900 0x100>;
|
||||
interrupts = <40 0x8>;
|
||||
fsl,rx-fifo-size = <16>;
|
||||
fsl,tx-fifo-size = <16>;
|
||||
};
|
||||
|
||||
pscfifo@11f00 {
|
||||
compatible = "fsl,mpc5121-psc-fifo";
|
||||
reg = <0x11f00 0x100>;
|
||||
interrupts = <40 0x8>;
|
||||
};
|
||||
|
||||
dma@14000 {
|
||||
compatible = "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
|
||||
reg = <0x14000 0x1800>;
|
||||
interrupts = <65 0x8>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -17,7 +17,7 @@
|
||||
|
||||
/ {
|
||||
model = "pdm360ng";
|
||||
compatible = "ifm,pdm360ng";
|
||||
compatible = "ifm,pdm360ng", "fsl,mpc5121";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
interrupt-parent = <&ipic>;
|
||||
|
||||
@ -13,7 +13,7 @@ CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_PPC_CHRP is not set
|
||||
CONFIG_PPC_MPC512x=y
|
||||
CONFIG_MPC5121_ADS=y
|
||||
CONFIG_MPC5121_GENERIC=y
|
||||
CONFIG_MPC512x_GENERIC=y
|
||||
CONFIG_PDM360NG=y
|
||||
# CONFIG_PPC_PMAC is not set
|
||||
CONFIG_NO_HZ=y
|
||||
|
||||
@ -15,16 +15,16 @@ config MPC5121_ADS
|
||||
help
|
||||
This option enables support for the MPC5121E ADS board.
|
||||
|
||||
config MPC5121_GENERIC
|
||||
bool "Generic support for simple MPC5121 based boards"
|
||||
config MPC512x_GENERIC
|
||||
bool "Generic support for simple MPC512x based boards"
|
||||
depends on PPC_MPC512x
|
||||
select DEFAULT_UIMAGE
|
||||
help
|
||||
This option enables support for simple MPC5121 based boards
|
||||
This option enables support for simple MPC512x based boards
|
||||
which do not need custom platform specific setup.
|
||||
|
||||
Compatible boards include: Protonic LVT base boards (ZANMCU
|
||||
and VICVT2).
|
||||
and VICVT2), Freescale MPC5125 Tower system.
|
||||
|
||||
config PDM360NG
|
||||
bool "ifm PDM360NG board"
|
||||
|
||||
@ -3,5 +3,5 @@
|
||||
#
|
||||
obj-y += clock.o mpc512x_shared.o
|
||||
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
|
||||
obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
|
||||
obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
|
||||
obj-$(CONFIG_PDM360NG) += pdm360ng.o
|
||||
|
||||
@ -29,6 +29,8 @@
|
||||
#include <asm/mpc5121.h>
|
||||
#include <asm/clk_interface.h>
|
||||
|
||||
#include "mpc512x.h"
|
||||
|
||||
#undef CLK_DEBUG
|
||||
|
||||
static int clocks_initialized;
|
||||
@ -683,8 +685,13 @@ static void psc_clks_init(void)
|
||||
struct device_node *np;
|
||||
struct platform_device *ofdev;
|
||||
u32 reg;
|
||||
const char *psc_compat;
|
||||
|
||||
for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
|
||||
psc_compat = mpc512x_select_psc_compat();
|
||||
if (!psc_compat)
|
||||
return;
|
||||
|
||||
for_each_compatible_node(np, NULL, psc_compat) {
|
||||
if (!of_property_read_u32(np, "reg", ®)) {
|
||||
int pscnum = (reg & 0xf00) >> 8;
|
||||
struct clk *clk = psc_dev_clk(pscnum);
|
||||
|
||||
@ -15,6 +15,7 @@ extern void __init mpc512x_init_IRQ(void);
|
||||
extern void __init mpc512x_init(void);
|
||||
extern int __init mpc5121_clk_init(void);
|
||||
void __init mpc512x_declare_of_platform_devices(void);
|
||||
extern const char *mpc512x_select_psc_compat(void);
|
||||
extern void mpc512x_restart(char *cmd);
|
||||
|
||||
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
|
||||
|
||||
@ -4,7 +4,7 @@
|
||||
* Author: John Rigby, <jrigby@freescale.com>
|
||||
*
|
||||
* Description:
|
||||
* MPC5121 SoC setup
|
||||
* MPC512x SoC setup
|
||||
*
|
||||
* This is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by
|
||||
@ -28,20 +28,22 @@
|
||||
*/
|
||||
static const char * const board[] __initconst = {
|
||||
"prt,prtlvt",
|
||||
"fsl,mpc5125ads",
|
||||
"ifm,ac14xx",
|
||||
NULL
|
||||
};
|
||||
|
||||
/*
|
||||
* Called very early, MMU is off, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init mpc5121_generic_probe(void)
|
||||
static int __init mpc512x_generic_probe(void)
|
||||
{
|
||||
return of_flat_dt_match(of_get_flat_dt_root(), board);
|
||||
}
|
||||
|
||||
define_machine(mpc5121_generic) {
|
||||
.name = "MPC5121 generic",
|
||||
.probe = mpc5121_generic_probe,
|
||||
define_machine(mpc512x_generic) {
|
||||
.name = "MPC512x generic",
|
||||
.probe = mpc512x_generic_probe,
|
||||
.init = mpc512x_init,
|
||||
.init_early = mpc512x_init_diu,
|
||||
.setup_arch = mpc512x_setup_diu,
|
||||
@ -330,26 +330,34 @@ void __init mpc512x_init_IRQ(void)
|
||||
static struct of_device_id __initdata of_bus_ids[] = {
|
||||
{ .compatible = "fsl,mpc5121-immr", },
|
||||
{ .compatible = "fsl,mpc5121-localbus", },
|
||||
{ .compatible = "fsl,mpc5121-mbx", },
|
||||
{ .compatible = "fsl,mpc5121-nfc", },
|
||||
{ .compatible = "fsl,mpc5121-sram", },
|
||||
{ .compatible = "fsl,mpc5121-pci", },
|
||||
{ .compatible = "gpio-leds", },
|
||||
{},
|
||||
};
|
||||
|
||||
void __init mpc512x_declare_of_platform_devices(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
|
||||
printk(KERN_ERR __FILE__ ": "
|
||||
"Error while probing of_platform bus\n");
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-nfc");
|
||||
if (np) {
|
||||
of_platform_device_create(np, NULL, NULL);
|
||||
of_node_put(np);
|
||||
}
|
||||
}
|
||||
|
||||
#define DEFAULT_FIFO_SIZE 16
|
||||
|
||||
const char *mpc512x_select_psc_compat(void)
|
||||
{
|
||||
if (of_machine_is_compatible("fsl,mpc5121"))
|
||||
return "fsl,mpc5121-psc";
|
||||
|
||||
if (of_machine_is_compatible("fsl,mpc5125"))
|
||||
return "fsl,mpc5125-psc";
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static unsigned int __init get_fifo_size(struct device_node *np,
|
||||
char *prop_name)
|
||||
{
|
||||
@ -375,9 +383,16 @@ void __init mpc512x_psc_fifo_init(void)
|
||||
void __iomem *psc;
|
||||
unsigned int tx_fifo_size;
|
||||
unsigned int rx_fifo_size;
|
||||
const char *psc_compat;
|
||||
int fifobase = 0; /* current fifo address in 32 bit words */
|
||||
|
||||
for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
|
||||
psc_compat = mpc512x_select_psc_compat();
|
||||
if (!psc_compat) {
|
||||
pr_err("%s: no compatible devices found\n", __func__);
|
||||
return;
|
||||
}
|
||||
|
||||
for_each_compatible_node(np, NULL, psc_compat) {
|
||||
tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size");
|
||||
rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size");
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user