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e1000: remove unused functions
after removal of pcie, need to remove some unnecessary functions Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Don Skidmore <donald.c.skidmore@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Jesse Brandeburg
David S. Miller
parent
1532ecea1d
commit
282b177782
@ -33,9 +33,6 @@
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#include "e1000_hw.h"
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static s32 e1000_swfw_sync_acquire(struct e1000_hw *hw, u16 mask);
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static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask);
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static s32 e1000_check_downshift(struct e1000_hw *hw);
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static s32 e1000_check_polarity(struct e1000_hw *hw,
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e1000_rev_polarity *polarity);
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@ -48,7 +45,6 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw);
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static s32 e1000_get_auto_rd_done(struct e1000_hw *hw);
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static s32 e1000_get_cable_length(struct e1000_hw *hw, u16 *min_length,
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u16 *max_length);
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static s32 e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw);
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static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw);
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static s32 e1000_id_led_init(struct e1000_hw *hw);
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static void e1000_init_rx_addrs(struct e1000_hw *hw);
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@ -61,7 +57,6 @@ static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words,
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static s32 e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd);
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static s32 e1000_phy_m88_get_info(struct e1000_hw *hw,
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struct e1000_phy_info *phy_info);
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static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw);
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static s32 e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active);
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static s32 e1000_wait_autoneg(struct e1000_hw *hw);
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static void e1000_write_reg_io(struct e1000_hw *hw, u32 offset, u32 value);
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@ -2607,70 +2602,6 @@ static u16 e1000_shift_in_mdi_bits(struct e1000_hw *hw)
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return data;
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}
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static s32 e1000_swfw_sync_acquire(struct e1000_hw *hw, u16 mask)
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{
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u32 swfw_sync = 0;
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u32 swmask = mask;
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u32 fwmask = mask << 16;
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s32 timeout = 200;
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DEBUGFUNC("e1000_swfw_sync_acquire");
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if (!hw->swfw_sync_present)
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return e1000_get_hw_eeprom_semaphore(hw);
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while (timeout) {
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if (e1000_get_hw_eeprom_semaphore(hw))
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return -E1000_ERR_SWFW_SYNC;
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swfw_sync = er32(SW_FW_SYNC);
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if (!(swfw_sync & (fwmask | swmask))) {
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break;
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}
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/* firmware currently using resource (fwmask) */
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/* or other software thread currently using resource (swmask) */
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e1000_put_hw_eeprom_semaphore(hw);
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mdelay(5);
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timeout--;
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}
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if (!timeout) {
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DEBUGOUT("Driver can't access resource, SW_FW_SYNC timeout.\n");
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return -E1000_ERR_SWFW_SYNC;
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}
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swfw_sync |= swmask;
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ew32(SW_FW_SYNC, swfw_sync);
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e1000_put_hw_eeprom_semaphore(hw);
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return E1000_SUCCESS;
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}
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static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask)
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{
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u32 swfw_sync;
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u32 swmask = mask;
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DEBUGFUNC("e1000_swfw_sync_release");
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if (!hw->swfw_sync_present) {
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e1000_put_hw_eeprom_semaphore(hw);
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return;
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}
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/* if (e1000_get_hw_eeprom_semaphore(hw))
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* return -E1000_ERR_SWFW_SYNC; */
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while (e1000_get_hw_eeprom_semaphore(hw) != E1000_SUCCESS);
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/* empty */
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swfw_sync = er32(SW_FW_SYNC);
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swfw_sync &= ~swmask;
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ew32(SW_FW_SYNC, swfw_sync);
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e1000_put_hw_eeprom_semaphore(hw);
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}
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/*****************************************************************************
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* Reads the value from a PHY register, if the value is on a specific non zero
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* page, sets the page first.
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@ -2680,28 +2611,19 @@ static void e1000_swfw_sync_release(struct e1000_hw *hw, u16 mask)
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s32 e1000_read_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 *phy_data)
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{
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u32 ret_val;
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u16 swfw;
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DEBUGFUNC("e1000_read_phy_reg");
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swfw = E1000_SWFW_PHY0_SM;
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if (e1000_swfw_sync_acquire(hw, swfw))
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return -E1000_ERR_SWFW_SYNC;
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if ((hw->phy_type == e1000_phy_igp) &&
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(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
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ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
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(u16)reg_addr);
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if (ret_val) {
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e1000_swfw_sync_release(hw, swfw);
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if (ret_val)
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return ret_val;
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}
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}
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ret_val = e1000_read_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
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phy_data);
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e1000_swfw_sync_release(hw, swfw);
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return ret_val;
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}
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@ -2787,28 +2709,20 @@ static s32 e1000_read_phy_reg_ex(struct e1000_hw *hw, u32 reg_addr,
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s32 e1000_write_phy_reg(struct e1000_hw *hw, u32 reg_addr, u16 phy_data)
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{
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u32 ret_val;
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u16 swfw;
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DEBUGFUNC("e1000_write_phy_reg");
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swfw = E1000_SWFW_PHY0_SM;
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if (e1000_swfw_sync_acquire(hw, swfw))
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return -E1000_ERR_SWFW_SYNC;
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if ((hw->phy_type == e1000_phy_igp) &&
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(reg_addr > MAX_PHY_MULTI_PAGE_REG)) {
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ret_val = e1000_write_phy_reg_ex(hw, IGP01E1000_PHY_PAGE_SELECT,
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(u16)reg_addr);
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if (ret_val) {
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e1000_swfw_sync_release(hw, swfw);
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if (ret_val)
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return ret_val;
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}
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}
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ret_val = e1000_write_phy_reg_ex(hw, MAX_PHY_REG_ADDRESS & reg_addr,
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phy_data);
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e1000_swfw_sync_release(hw, swfw);
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return ret_val;
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}
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@ -2883,18 +2797,12 @@ s32 e1000_phy_hw_reset(struct e1000_hw *hw)
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u32 ctrl, ctrl_ext;
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u32 led_ctrl;
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s32 ret_val;
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u16 swfw;
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DEBUGFUNC("e1000_phy_hw_reset");
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DEBUGOUT("Resetting Phy...\n");
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if (hw->mac_type > e1000_82543) {
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swfw = E1000_SWFW_PHY0_SM;
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if (e1000_swfw_sync_acquire(hw, swfw)) {
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DEBUGOUT("Unable to acquire swfw sync\n");
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return -E1000_ERR_SWFW_SYNC;
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}
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/* Read the device control register and assert the E1000_CTRL_PHY_RST
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* bit. Then, take it out of reset.
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* For e1000 hardware, we delay for 10ms between the assert
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@ -2908,8 +2816,6 @@ s32 e1000_phy_hw_reset(struct e1000_hw *hw)
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ew32(CTRL, ctrl);
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E1000_WRITE_FLUSH();
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e1000_swfw_sync_release(hw, swfw);
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} else {
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/* Read the Extended Device Control Register, assert the PHY_RESET_DIR
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* bit to put the PHY into reset. Then, take it out of reset.
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@ -3515,8 +3421,6 @@ static s32 e1000_acquire_eeprom(struct e1000_hw *hw)
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DEBUGFUNC("e1000_acquire_eeprom");
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if (e1000_swfw_sync_acquire(hw, E1000_SWFW_EEP_SM))
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return -E1000_ERR_SWFW_SYNC;
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eecd = er32(EECD);
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/* Request EEPROM Access */
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@ -3534,7 +3438,6 @@ static s32 e1000_acquire_eeprom(struct e1000_hw *hw)
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eecd &= ~E1000_EECD_REQ;
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ew32(EECD, eecd);
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DEBUGOUT("Could not acquire EEPROM grant\n");
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e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
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return -E1000_ERR_EEPROM;
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}
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}
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@ -3653,8 +3556,6 @@ static void e1000_release_eeprom(struct e1000_hw *hw)
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eecd &= ~E1000_EECD_REQ;
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ew32(EECD, eecd);
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}
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e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
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}
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/******************************************************************************
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@ -3847,8 +3748,6 @@ static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words,
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u32 i = 0;
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s32 error = 0;
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if (e1000_swfw_sync_acquire(hw, E1000_SWFW_EEP_SM))
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return -E1000_ERR_SWFW_SYNC;
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for (i = 0; i < words; i++) {
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register_value = (data[i] << E1000_EEPROM_RW_REG_DATA) |
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@ -3869,7 +3768,6 @@ static s32 e1000_write_eeprom_eewr(struct e1000_hw *hw, u16 offset, u16 words,
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}
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}
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e1000_swfw_sync_release(hw, E1000_SWFW_EEP_SM);
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return error;
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}
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@ -5681,71 +5579,3 @@ static s32 e1000_get_phy_cfg_done(struct e1000_hw *hw)
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mdelay(10);
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return E1000_SUCCESS;
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}
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/***************************************************************************
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*
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* Using the combination of SMBI and SWESMBI semaphore bits when resetting
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* adapter or Eeprom access.
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*
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* hw: Struct containing variables accessed by shared code
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*
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* returns: - E1000_ERR_EEPROM if fail to access EEPROM.
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* E1000_SUCCESS at any other case.
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*
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***************************************************************************/
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static s32 e1000_get_hw_eeprom_semaphore(struct e1000_hw *hw)
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{
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s32 timeout;
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u32 swsm;
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DEBUGFUNC("e1000_get_hw_eeprom_semaphore");
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if (!hw->eeprom_semaphore_present)
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return E1000_SUCCESS;
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/* Get the FW semaphore. */
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timeout = hw->eeprom.word_size + 1;
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while (timeout) {
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swsm = er32(SWSM);
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swsm |= E1000_SWSM_SWESMBI;
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ew32(SWSM, swsm);
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/* if we managed to set the bit we got the semaphore. */
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swsm = er32(SWSM);
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if (swsm & E1000_SWSM_SWESMBI)
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break;
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udelay(50);
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timeout--;
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}
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if (!timeout) {
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/* Release semaphores */
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e1000_put_hw_eeprom_semaphore(hw);
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DEBUGOUT("Driver can't access the Eeprom - SWESMBI bit is set.\n");
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return -E1000_ERR_EEPROM;
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}
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return E1000_SUCCESS;
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}
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/***************************************************************************
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* This function clears HW semaphore bits.
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*
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* hw: Struct containing variables accessed by shared code
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*
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* returns: - None.
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*
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***************************************************************************/
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static void e1000_put_hw_eeprom_semaphore(struct e1000_hw *hw)
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{
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u32 swsm;
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DEBUGFUNC("e1000_put_hw_eeprom_semaphore");
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if (!hw->eeprom_semaphore_present)
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return;
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swsm = er32(SWSM);
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swsm &= ~(E1000_SWSM_SWESMBI);
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ew32(SWSM, swsm);
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}
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@ -284,7 +284,6 @@ typedef enum {
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#define E1000_ERR_MASTER_REQUESTS_PENDING 10
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#define E1000_ERR_HOST_INTERFACE_COMMAND 11
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#define E1000_BLK_PHY_RESET 12
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#define E1000_ERR_SWFW_SYNC 13
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#define E1000_BYTE_SWAP_WORD(_value) ((((_value) & 0x00ff) << 8) | \
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(((_value) & 0xff00) >> 8))
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@ -1327,7 +1326,6 @@ struct e1000_hw {
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e1000_ffe_config ffe_config_state;
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u32 asf_firmware_present;
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u32 eeprom_semaphore_present;
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u32 swfw_sync_present;
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unsigned long io_base;
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u32 phy_id;
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u32 phy_revision;
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