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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-18 18:23:53 +08:00

clk: basic: improve parent_names & return errors

This patch is the basic clk version of 'clk: core: copy parent_names &
return error codes'.

The registration functions are changed to allow the core code to copy
the array of strings and allow platforms to declare those arrays as
__initdata.

This patch also converts all of the basic clk registration functions to
return error codes which better aligns them with the existing clk.h api.

Signed-off-by: Mike Turquette <mturquette@linaro.org>
This commit is contained in:
Mike Turquette 2012-03-26 17:51:03 -07:00
parent d1302a36a7
commit 27d545915f
5 changed files with 64 additions and 56 deletions

View File

@ -153,6 +153,18 @@ const struct clk_ops clk_divider_ops = {
};
EXPORT_SYMBOL_GPL(clk_divider_ops);
/**
* clk_register_divider - register a divider clock with the clock framework
* @dev: device registering this clock
* @name: name of this clock
* @parent_name: name of clock's parent
* @flags: framework-specific flags
* @reg: register address to adjust divider
* @shift: number of bits to shift the bitfield
* @width: width of the bitfield
* @clk_divider_flags: divider-specific flags for this clock
* @lock: shared register lock for this clock
*/
struct clk *clk_register_divider(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 shift, u8 width,
@ -161,11 +173,11 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
struct clk_divider *div;
struct clk *clk;
/* allocate the divider */
div = kzalloc(sizeof(struct clk_divider), GFP_KERNEL);
if (!div) {
pr_err("%s: could not allocate divider clk\n", __func__);
return NULL;
return ERR_PTR(-ENOMEM);
}
/* struct clk_divider assignments */
@ -175,23 +187,15 @@ struct clk *clk_register_divider(struct device *dev, const char *name,
div->flags = clk_divider_flags;
div->lock = lock;
if (parent_name) {
div->parent[0] = kstrdup(parent_name, GFP_KERNEL);
if (!div->parent[0])
goto out;
}
/* register the clock */
clk = clk_register(dev, name,
&clk_divider_ops, &div->hw,
div->parent,
(parent_name ? &parent_name: NULL),
(parent_name ? 1 : 0),
flags);
if (clk)
return clk;
out:
kfree(div->parent[0]);
kfree(div);
if (IS_ERR(clk))
kfree(div);
return NULL;
return clk;
}

View File

@ -38,16 +38,23 @@ const struct clk_ops clk_fixed_rate_ops = {
};
EXPORT_SYMBOL_GPL(clk_fixed_rate_ops);
/**
* clk_register_fixed_rate - register fixed-rate clock with the clock framework
* @dev: device that is registering this clock
* @name: name of this clock
* @parent_name: name of clock's parent
* @flags: framework-specific flags
* @fixed_rate: non-adjustable clock rate
*/
struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
unsigned long fixed_rate)
{
struct clk_fixed_rate *fixed;
char **parent_names = NULL;
u8 len;
struct clk *clk;
/* allocate fixed-rate clock */
fixed = kzalloc(sizeof(struct clk_fixed_rate), GFP_KERNEL);
if (!fixed) {
pr_err("%s: could not allocate fixed clk\n", __func__);
return ERR_PTR(-ENOMEM);
@ -56,26 +63,15 @@ struct clk *clk_register_fixed_rate(struct device *dev, const char *name,
/* struct clk_fixed_rate assignments */
fixed->fixed_rate = fixed_rate;
if (parent_name) {
parent_names = kmalloc(sizeof(char *), GFP_KERNEL);
if (! parent_names)
goto out;
len = sizeof(char) * strlen(parent_name);
parent_names[0] = kmalloc(len, GFP_KERNEL);
if (!parent_names[0])
goto out;
strncpy(parent_names[0], parent_name, len);
}
out:
return clk_register(dev, name,
/* register the clock */
clk = clk_register(dev, name,
&clk_fixed_rate_ops, &fixed->hw,
parent_names,
(parent_name ? &parent_name : NULL),
(parent_name ? 1 : 0),
flags);
if (IS_ERR(clk))
kfree(fixed);
return clk;
}

View File

@ -105,6 +105,17 @@ const struct clk_ops clk_gate_ops = {
};
EXPORT_SYMBOL_GPL(clk_gate_ops);
/**
* clk_register_gate - register a gate clock with the clock framework
* @dev: device that is registering this clock
* @name: name of this clock
* @parent_name: name of this clock's parent
* @flags: framework-specific flags for this clock
* @reg: register address to control gating of this clock
* @bit_idx: which bit in the register controls gating of this clock
* @clk_gate_flags: gate-specific flags for this clock
* @lock: shared register lock for this clock
*/
struct clk *clk_register_gate(struct device *dev, const char *name,
const char *parent_name, unsigned long flags,
void __iomem *reg, u8 bit_idx,
@ -113,11 +124,11 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
struct clk_gate *gate;
struct clk *clk;
/* allocate the gate */
gate = kzalloc(sizeof(struct clk_gate), GFP_KERNEL);
if (!gate) {
pr_err("%s: could not allocate gated clk\n", __func__);
return NULL;
return ERR_PTR(-ENOMEM);
}
/* struct clk_gate assignments */
@ -126,22 +137,15 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
gate->flags = clk_gate_flags;
gate->lock = lock;
if (parent_name) {
gate->parent[0] = kstrdup(parent_name, GFP_KERNEL);
if (!gate->parent[0])
goto out;
}
/* register the clock */
clk = clk_register(dev, name,
&clk_gate_ops, &gate->hw,
gate->parent,
(parent_name ? &parent_name : NULL),
(parent_name ? 1 : 0),
flags);
if (clk)
return clk;
out:
kfree(gate->parent[0]);
kfree(gate);
return NULL;
if (IS_ERR(clk))
kfree(gate);
return clk;
}

View File

@ -94,9 +94,10 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
u8 clk_mux_flags, spinlock_t *lock)
{
struct clk_mux *mux;
struct clk *clk;
/* allocate the mux */
mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);
if (!mux) {
pr_err("%s: could not allocate mux clk\n", __func__);
return ERR_PTR(-ENOMEM);
@ -109,6 +110,11 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
mux->flags = clk_mux_flags;
mux->lock = lock;
return clk_register(dev, name, &clk_mux_ops, &mux->hw,
clk = clk_register(dev, name, &clk_mux_ops, &mux->hw,
parent_names, num_parents, flags);
if (IS_ERR(clk))
kfree(mux);
return clk;
}

View File

@ -176,7 +176,6 @@ struct clk_gate {
u8 bit_idx;
u8 flags;
spinlock_t *lock;
const char *parent[1];
};
#define CLK_GATE_SET_TO_DISABLE BIT(0)
@ -214,7 +213,6 @@ struct clk_divider {
u8 width;
u8 flags;
spinlock_t *lock;
const char *parent[1];
};
#define CLK_DIVIDER_ONE_BASED BIT(0)