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PCI: Add resizable BAR infrastructure
Add resizable BAR infrastructure, including defines and helper functions to read the possible sizes of a BAR and update its size. See PCIe r3.1, sec 7.22. Link: https://pcisig.com/sites/default/files/specification_documents/ECN_Resizable-BAR_24Apr2008.pdf Signed-off-by: Christian König <christian.koenig@amd.com> [bhelgaas: rename to functions with "rebar" (to match #defines), drop shift #defines, drop "_MASK" suffixes, fix typos, fix kerneldoc] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
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@ -2965,6 +2965,107 @@ bool pci_acs_path_enabled(struct pci_dev *start,
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return true;
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}
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/**
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* pci_rebar_find_pos - find position of resize ctrl reg for BAR
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* @pdev: PCI device
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* @bar: BAR to find
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*
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* Helper to find the position of the ctrl register for a BAR.
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* Returns -ENOTSUPP if resizable BARs are not supported at all.
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* Returns -ENOENT if no ctrl register for the BAR could be found.
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*/
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static int pci_rebar_find_pos(struct pci_dev *pdev, int bar)
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{
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unsigned int pos, nbars, i;
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u32 ctrl;
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pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_REBAR);
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if (!pos)
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return -ENOTSUPP;
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pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
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nbars = (ctrl & PCI_REBAR_CTRL_NBAR_MASK) >>
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PCI_REBAR_CTRL_NBAR_SHIFT;
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for (i = 0; i < nbars; i++, pos += 8) {
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int bar_idx;
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pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
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bar_idx = ctrl & PCI_REBAR_CTRL_BAR_IDX;
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if (bar_idx == bar)
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return pos;
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}
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return -ENOENT;
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}
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/**
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* pci_rebar_get_possible_sizes - get possible sizes for BAR
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* @pdev: PCI device
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* @bar: BAR to query
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*
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* Get the possible sizes of a resizable BAR as bitmask defined in the spec
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* (bit 0=1MB, bit 19=512GB). Returns 0 if BAR isn't resizable.
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*/
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u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar)
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{
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int pos;
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u32 cap;
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pos = pci_rebar_find_pos(pdev, bar);
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if (pos < 0)
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return 0;
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pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap);
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return (cap & PCI_REBAR_CAP_SIZES) >> 4;
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}
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/**
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* pci_rebar_get_current_size - get the current size of a BAR
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* @pdev: PCI device
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* @bar: BAR to set size to
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*
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* Read the size of a BAR from the resizable BAR config.
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* Returns size if found or negative error code.
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*/
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int pci_rebar_get_current_size(struct pci_dev *pdev, int bar)
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{
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int pos;
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u32 ctrl;
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pos = pci_rebar_find_pos(pdev, bar);
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if (pos < 0)
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return pos;
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pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
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return (ctrl & PCI_REBAR_CTRL_BAR_SIZE) >> 8;
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}
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/**
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* pci_rebar_set_size - set a new size for a BAR
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* @pdev: PCI device
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* @bar: BAR to set size to
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* @size: new size as defined in the spec (0=1MB, 19=512GB)
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*
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* Set the new size of a BAR as defined in the spec.
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* Returns zero if resizing was successful, error code otherwise.
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*/
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int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size)
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{
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int pos;
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u32 ctrl;
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pos = pci_rebar_find_pos(pdev, bar);
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if (pos < 0)
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return pos;
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pci_read_config_dword(pdev, pos + PCI_REBAR_CTRL, &ctrl);
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ctrl &= ~PCI_REBAR_CTRL_BAR_SIZE;
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ctrl |= size << 8;
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pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl);
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return 0;
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}
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/**
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* pci_swizzle_interrupt_pin - swizzle INTx for device behind bridge
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* @dev: the PCI device
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@ -366,4 +366,12 @@ int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment,
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struct resource *res);
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#endif
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u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar);
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int pci_rebar_get_current_size(struct pci_dev *pdev, int bar);
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int pci_rebar_set_size(struct pci_dev *pdev, int bar, int size);
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static inline u64 pci_rebar_size_to_bytes(int size)
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{
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return 1ULL << (size + 20);
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}
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#endif /* DRIVERS_PCI_H */
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@ -939,9 +939,13 @@
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#define PCI_SATA_SIZEOF_LONG 16
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/* Resizable BARs */
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#define PCI_REBAR_CAP 4 /* capability register */
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#define PCI_REBAR_CAP_SIZES 0x00FFFFF0 /* supported BAR sizes */
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#define PCI_REBAR_CTRL 8 /* control register */
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#define PCI_REBAR_CTRL_NBAR_MASK (7 << 5) /* mask for # bars */
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#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # bars */
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#define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */
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#define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */
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#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */
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#define PCI_REBAR_CTRL_BAR_SIZE 0x00001F00 /* BAR size */
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/* Dynamic Power Allocation */
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#define PCI_DPA_CAP 4 /* capability register */
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