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powerpc/perf: Use MSR to report privilege level on P9 DD1
SIER and SIAR are not updated correctly for some samples, so force the use of MSR and regs->nip instead for misc_flag updates. This is done by adding a new ppmu flag and updating the use_siar logic in perf_read_regs() to use it, and dropping the PPMU_HAS_SIER flag. Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com> [mpe: Rename flag to PPMU_NO_SIAR, and also drop PPMU_HAS_SIER] Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -65,6 +65,7 @@ struct power_pmu {
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#define PPMU_HAS_SSLOT 0x00000020 /* Has sampled slot in MMCRA */
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#define PPMU_HAS_SIER 0x00000040 /* Has SIER */
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#define PPMU_ARCH_207S 0x00000080 /* PMC is architecture v2.07S */
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#define PPMU_NO_SIAR 0x00000100 /* Do not use SIAR */
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/*
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* Values for flags to get_alternatives()
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@ -295,6 +295,8 @@ static inline void perf_read_regs(struct pt_regs *regs)
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*/
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if (TRAP(regs) != 0xf00)
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use_siar = 0;
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else if ((ppmu->flags & PPMU_NO_SIAR))
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use_siar = 0;
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else if (marked)
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use_siar = 1;
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else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))
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@ -384,7 +384,7 @@ static struct power_pmu power9_isa207_pmu = {
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.bhrb_filter_map = power9_bhrb_filter_map,
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.get_constraint = isa207_get_constraint,
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.disable_pmc = isa207_disable_pmc,
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.flags = PPMU_HAS_SIER | PPMU_ARCH_207S,
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.flags = PPMU_NO_SIAR | PPMU_ARCH_207S,
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.n_generic = ARRAY_SIZE(power9_generic_events),
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.generic_events = power9_generic_events,
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.cache_events = &power9_cache_events,
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