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ARM: OMAP3xxx: hwmod: Convert SHAM crypto device data to hwmod
Convert the device data for the OMAP3 SHAM2 (SHA1/MD5) crypto IP from explicit platform_data to hwmod. CC: Paul Walmsley <paul@pwsan.com> Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> [paul@pwsan.com: updated to use per-SoC registration lists for GP-only hwmods; fixed lines causing sparse warnings] Signed-off-by: Paul Walmsley <paul@pwsan.com>
This commit is contained in:
Mark A. Greer
Paul Walmsley
parent
fa7807b4cc
commit
26f88e6ebf
@ -3473,6 +3473,7 @@ static struct omap_clk omap3xxx_clks[] = {
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CLK(NULL, "gpt1_fck", &gpt1_fck),
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CLK(NULL, "wkup_32k_fck", &wkup_32k_fck),
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CLK(NULL, "gpio1_dbck", &gpio1_dbck),
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CLK(NULL, "sha12_ick", &sha12_ick),
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CLK(NULL, "wdt2_fck", &wdt2_fck),
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CLK("omap_wdt", "ick", &wdt2_ick),
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CLK(NULL, "wdt2_ick", &wdt2_ick),
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@ -504,38 +504,9 @@ static void omap_init_rng(void)
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WARN(IS_ERR(pdev), "Can't build omap_device for omap_rng\n");
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}
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#if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
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#ifdef CONFIG_ARCH_OMAP3
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static struct resource omap3_sham_resources[] = {
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{
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.start = OMAP34XX_SEC_SHA1MD5_BASE,
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.end = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = 49 + OMAP_INTC_START,
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.flags = IORESOURCE_IRQ,
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},
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{
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.start = OMAP34XX_DMA_SHA1MD5_RX,
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.flags = IORESOURCE_DMA,
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}
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};
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static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
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#else
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#define omap3_sham_resources NULL
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#define omap3_sham_resources_sz 0
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#endif
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static struct platform_device sham_device = {
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.name = "omap-sham",
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.id = -1,
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};
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static void omap_init_sham(void)
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static void __init omap_init_sham(void)
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{
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if (cpu_is_omap24xx()) {
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if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
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struct omap_hwmod *oh;
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struct platform_device *pdev;
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@ -545,18 +516,10 @@ static void omap_init_sham(void)
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pdev = omap_device_build("omap-sham", -1, oh, NULL, 0);
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WARN(IS_ERR(pdev), "Can't build omap_device for omap-sham\n");
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} else if (cpu_is_omap34xx()) {
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sham_device.resource = omap3_sham_resources;
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sham_device.num_resources = omap3_sham_resources_sz;
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platform_device_register(&sham_device);
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} else {
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pr_err("%s: platform not supported\n", __func__);
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return;
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}
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}
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#else
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static inline void omap_init_sham(void) { }
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#endif
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#if defined(CONFIG_CRYPTO_DEV_OMAP_AES) || defined(CONFIG_CRYPTO_DEV_OMAP_AES_MODULE)
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@ -3545,6 +3545,71 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__gpmc = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> SHAM2 (SHA1/MD5) (similar to omap24xx) */
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static struct omap_hwmod_sysc_fields omap3_sham_sysc_fields = {
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.sidle_shift = 4,
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.srst_shift = 1,
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.autoidle_shift = 0,
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};
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static struct omap_hwmod_class_sysconfig omap3_sham_sysc = {
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.rev_offs = 0x5c,
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.sysc_offs = 0x60,
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.syss_offs = 0x64,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
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.sysc_fields = &omap3_sham_sysc_fields,
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};
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static struct omap_hwmod_class omap3xxx_sham_class = {
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.name = "sham",
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.sysc = &omap3_sham_sysc,
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};
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static struct omap_hwmod_irq_info omap3_sham_mpu_irqs[] = {
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{ .irq = 49 + OMAP_INTC_START, },
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{ .irq = -1 }
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};
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static struct omap_hwmod_dma_info omap3_sham_sdma_reqs[] = {
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{ .name = "rx", .dma_req = OMAP34XX_DMA_SHA1MD5_RX, },
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{ .dma_req = -1 }
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};
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static struct omap_hwmod omap3xxx_sham_hwmod = {
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.name = "sham",
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.mpu_irqs = omap3_sham_mpu_irqs,
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.sdma_reqs = omap3_sham_sdma_reqs,
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.main_clk = "sha12_ick",
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.prcm = {
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.omap2 = {
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.module_offs = CORE_MOD,
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_SHA12_SHIFT,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430_ST_SHA12_SHIFT,
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},
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},
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.class = &omap3xxx_sham_class,
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};
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static struct omap_hwmod_addr_space omap3xxx_sham_addrs[] = {
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{
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.pa_start = 0x480c3000,
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.pa_end = 0x480c3000 + 0x64 - 1,
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.flags = ADDR_TYPE_RT
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},
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{ }
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};
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__sham = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap3xxx_sham_hwmod,
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.clk = "sha12_ick",
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.addr = omap3xxx_sham_addrs,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
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&omap3xxx_l3_main__l4_core,
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&omap3xxx_l3_main__l4_per,
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@ -3596,8 +3661,28 @@ static struct omap_hwmod_ocp_if *omap3xxx_hwmod_ocp_ifs[] __initdata = {
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};
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/* GP-only hwmod links */
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static struct omap_hwmod_ocp_if *omap3xxx_gp_hwmod_ocp_ifs[] __initdata = {
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static struct omap_hwmod_ocp_if *omap34xx_gp_hwmod_ocp_ifs[] __initdata = {
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&omap3xxx_l4_sec__timer12,
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&omap3xxx_l4_core__sham,
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NULL
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};
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static struct omap_hwmod_ocp_if *omap36xx_gp_hwmod_ocp_ifs[] __initdata = {
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&omap3xxx_l4_sec__timer12,
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&omap3xxx_l4_core__sham,
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NULL
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};
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static struct omap_hwmod_ocp_if *am35xx_gp_hwmod_ocp_ifs[] __initdata = {
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&omap3xxx_l4_sec__timer12,
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/*
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* Apparently the SHA/MD5 accelerator IP block is only present
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* on some AM35xx chips, and no one knows which ones. See
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* http://www.spinics.net/lists/arm-kernel/msg215466.html So
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* if you need this IP block on an AM35xx, try uncommenting
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* the next line.
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*/
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/* &omap3xxx_l4_core__sham, */
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NULL
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};
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@ -3704,7 +3789,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = {
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int __init omap3xxx_hwmod_init(void)
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{
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int r;
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struct omap_hwmod_ocp_if **h = NULL;
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struct omap_hwmod_ocp_if **h = NULL, **h_gp = NULL;
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unsigned int rev;
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omap_hwmod_init();
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@ -3714,13 +3799,6 @@ int __init omap3xxx_hwmod_init(void)
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if (r < 0)
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return r;
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/* Register GP-only hwmod links. */
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if (omap_type() == OMAP2_DEVICE_TYPE_GP) {
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r = omap_hwmod_register_links(omap3xxx_gp_hwmod_ocp_ifs);
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if (r < 0)
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return r;
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}
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rev = omap_rev();
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/*
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@ -3732,11 +3810,14 @@ int __init omap3xxx_hwmod_init(void)
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rev == OMAP3430_REV_ES2_1 || rev == OMAP3430_REV_ES3_0 ||
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rev == OMAP3430_REV_ES3_1 || rev == OMAP3430_REV_ES3_1_2) {
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h = omap34xx_hwmod_ocp_ifs;
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h_gp = omap34xx_gp_hwmod_ocp_ifs;
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} else if (rev == AM35XX_REV_ES1_0 || rev == AM35XX_REV_ES1_1) {
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h = am35xx_hwmod_ocp_ifs;
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h_gp = am35xx_gp_hwmod_ocp_ifs;
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} else if (rev == OMAP3630_REV_ES1_0 || rev == OMAP3630_REV_ES1_1 ||
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rev == OMAP3630_REV_ES1_2) {
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h = omap36xx_hwmod_ocp_ifs;
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h_gp = omap36xx_gp_hwmod_ocp_ifs;
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} else {
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WARN(1, "OMAP3 hwmod family init: unknown chip type\n");
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return -EINVAL;
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@ -3746,6 +3827,14 @@ int __init omap3xxx_hwmod_init(void)
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if (r < 0)
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return r;
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/* Register GP-only hwmod links. */
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if (h_gp && omap_type() == OMAP2_DEVICE_TYPE_GP) {
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r = omap_hwmod_register_links(h_gp);
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if (r < 0)
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return r;
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}
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/*
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* Register hwmod links specific to certain ES levels of a
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* particular family of silicon (e.g., 34xx ES1.0)
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