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clk: tegra: dfll: Reformat CVB frequency table

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Increase the readability of the CVB frequency table by reformatting it a
little.

Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Thierry Reding 2016-04-08 15:17:27 +02:00
parent f7c42d9862
commit 2690e91264
1 changed files with 25 additions and 25 deletions
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50
drivers/clk/tegra/clk-tegra124-dfll-fcpu.c
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@ -48,31 +48,31 @@ static const struct cvb_table tegra124_cpu_cvb_tables[] = {
.speedo_scale = 100,
.voltage_scale = 1000,
.entries = {
{204000000UL, {1112619, -29295, 402} },
{306000000UL, {1150460, -30585, 402} },
{408000000UL, {1190122, -31865, 402} },
{510000000UL, {1231606, -33155, 402} },
{612000000UL, {1274912, -34435, 402} },
{714000000UL, {1320040, -35725, 402} },
{816000000UL, {1366990, -37005, 402} },
{918000000UL, {1415762, -38295, 402} },
{1020000000UL, {1466355, -39575, 402} },
{1122000000UL, {1518771, -40865, 402} },
{1224000000UL, {1573009, -42145, 402} },
{1326000000UL, {1629068, -43435, 402} },
{1428000000UL, {1686950, -44715, 402} },
{1530000000UL, {1746653, -46005, 402} },
{1632000000UL, {1808179, -47285, 402} },
{1734000000UL, {1871526, -48575, 402} },
{1836000000UL, {1936696, -49855, 402} },
{1938000000UL, {2003687, -51145, 402} },
{2014500000UL, {2054787, -52095, 402} },
{2116500000UL, {2124957, -53385, 402} },
{2218500000UL, {2196950, -54665, 402} },
{2320500000UL, {2270765, -55955, 402} },
{2422500000UL, {2346401, -57235, 402} },
{2524500000UL, {2437299, -58535, 402} },
{0, { 0, 0, 0} },
{ 204000000UL, { 1112619, -29295, 402 } },
{ 306000000UL, { 1150460, -30585, 402 } },
{ 408000000UL, { 1190122, -31865, 402 } },
{ 510000000UL, { 1231606, -33155, 402 } },
{ 612000000UL, { 1274912, -34435, 402 } },
{ 714000000UL, { 1320040, -35725, 402 } },
{ 816000000UL, { 1366990, -37005, 402 } },
{ 918000000UL, { 1415762, -38295, 402 } },
{ 1020000000UL, { 1466355, -39575, 402 } },
{ 1122000000UL, { 1518771, -40865, 402 } },
{ 1224000000UL, { 1573009, -42145, 402 } },
{ 1326000000UL, { 1629068, -43435, 402 } },
{ 1428000000UL, { 1686950, -44715, 402 } },
{ 1530000000UL, { 1746653, -46005, 402 } },
{ 1632000000UL, { 1808179, -47285, 402 } },
{ 1734000000UL, { 1871526, -48575, 402 } },
{ 1836000000UL, { 1936696, -49855, 402 } },
{ 1938000000UL, { 2003687, -51145, 402 } },
{ 2014500000UL, { 2054787, -52095, 402 } },
{ 2116500000UL, { 2124957, -53385, 402 } },
{ 2218500000UL, { 2196950, -54665, 402 } },
{ 2320500000UL, { 2270765, -55955, 402 } },
{ 2422500000UL, { 2346401, -57235, 402 } },
{ 2524500000UL, { 2437299, -58535, 402 } },
{ 0UL, { 0, 0, 0 } },
},
.cpu_dfll_data = {
.tune0_low = 0x005020ff,