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mei: me: store irq number in the hw struct.

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Store irq number in hw struct to by used by synchronize_irq().
This is to allow working with mei devices
embedded within another pci devices, via MFD framework,
where mei device is represented as a platform device.

Bump the copyright year to 2019 on hw-me.c and hw-me.h

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20191106223841.15802-3-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Alexander Usyskin 2019-11-07 00:38:40 +02:00 committed by Greg Kroah-Hartman
parent 907b471ca2
commit 261b3e1f2a
3 changed files with 5 additions and 2 deletions
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4
drivers/misc/mei/hw-me.c
View File

@ -323,9 +323,9 @@ static void mei_me_intr_disable(struct mei_device *dev)
*/ */
static void mei_me_synchronize_irq(struct mei_device *dev) static void mei_me_synchronize_irq(struct mei_device *dev)
{ {
struct pci_dev *pdev = to_pci_dev(dev->dev); struct mei_me_hw *hw = to_me_hw(dev);
synchronize_irq(pdev->irq); synchronize_irq(hw->irq);
} }
/** /**

2
drivers/misc/mei/hw-me.h
View File

@ -42,6 +42,7 @@ struct mei_cfg {
* *
* @cfg: per device generation config and ops * @cfg: per device generation config and ops
* @mem_addr: io memory address * @mem_addr: io memory address
* @irq: irq number
* @pg_state: power gating state * @pg_state: power gating state
* @d0i3_supported: di03 support * @d0i3_supported: di03 support
* @hbuf_depth: depth of hardware host/write buffer in slots * @hbuf_depth: depth of hardware host/write buffer in slots
@ -49,6 +50,7 @@ struct mei_cfg {
struct mei_me_hw { struct mei_me_hw {
const struct mei_cfg *cfg; const struct mei_cfg *cfg;
void __iomem *mem_addr; void __iomem *mem_addr;
int irq;
enum mei_pg_state pg_state; enum mei_pg_state pg_state;
bool d0i3_supported; bool d0i3_supported;
u8 hbuf_depth; u8 hbuf_depth;

1
drivers/misc/mei/pci-me.c
View File

@ -199,6 +199,7 @@ static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
} }
hw = to_me_hw(dev); hw = to_me_hw(dev);
hw->mem_addr = pcim_iomap_table(pdev)[0]; hw->mem_addr = pcim_iomap_table(pdev)[0];
hw->irq = pdev->irq;
pci_enable_msi(pdev); pci_enable_msi(pdev);