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Renesas ARM based SoC SMP updates for v3.12
* Per-CPU SMP boot and sleep code on SoCs that use SCU * Shared SCU CPU Hotplug code on r8a7779 and sh73a0 SoCs * Shared SCU CPU boot code on emev2, r8a7779 and sh73a0 SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABAgAGBQJSAawzAAoJENfPZGlqN0++MRgP/0TDYa+QhVd6h43a6tZ7OBGp +sln2YQOrQFSSSVxnqIwFAfISoG0Fb0upvlalvPueLSUP4NCNDAIgNVilUMkOwZq qkDr3QAIcp+tJq/jzI+y7gK0T6DWAIgutLX8n/GbR9ZAGl4huRZiM1kRnRotUA89 mhK0I8B2xNFeqdqhFm9UqslCctuQDxCdFSJhDl+mV+cM6cQyXfbP4XFXI53x5i7d 91YDa6/zVeGGL9sqVFthEESXmZMpjWgO3Rnw0QByp/hvXDRF+AsMxUQx2B+65zm7 SsUEBdUTXTtarqVr5oiqYOzMiFQ8tJXNXUxghRcN5RET5KsdHye/uwWzV01qtcBj d917baHS3Po5EQ6TxOseaRLSHmNVfeDn00esxRz+KywnTjZzhKh3AcZq640a0UPf ljjKLAiQvWLcdawG6rp24TA4nOS3jwIyALvgrRL0k74oie5O/yV307+n/m46iJvA d08+mBNkKTWV+uZQXo9cxyRITD/b3Wv27AXS+hPdRwCX3BtA81Y2w7u5LnlskuZr H3HvvJ3G9OzkvXZTdqolntqBUn9Fr++ptJjzZG+WYPM8KGngKeSBR9a3NrwSCa2v xprAEXb8hg1h3E721xGckIk7b6IJbGdN7euSEy4T/XNaj2wI4jLfGE/5adZk54+H MxumRYYdhJqudCJs0lhy =6QVN -----END PGP SIGNATURE----- Merge tag 'renesas-smp-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/renesas From Simon Horman: Renesas ARM based SoC SMP updates for v3.12 * Per-CPU SMP boot and sleep code on SoCs that use SCU * Shared SCU CPU Hotplug code on r8a7779 and sh73a0 SoCs * Shared SCU CPU boot code on emev2, r8a7779 and sh73a0 SoCs * tag 'renesas-smp-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Per-CPU SMP boot / sleep code for SCU SoCs ARM: shmobile: Introduce per-CPU SMP boot / sleep code ARM: shmobile: Use shared SCU CPU Hotplug code on r8a7779 ARM: shmobile: Use shared SCU CPU Hotplug code on sh73a0 ARM: shmobile: Add shared SCU CPU Hotplug code ARM: shmobile: Use shared SCU SMP boot code on emev2 ARM: shmobile: Use shared SCU SMP boot code on r8a7779 ARM: shmobile: Use shared SCU SMP boot code on sh73a0 ARM: shmobile: Introduce shared SCU SMP boot code Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
25475030ec
@ -17,9 +17,9 @@ obj-$(CONFIG_ARCH_EMEV2) += setup-emev2.o clock-emev2.o
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# SMP objects
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smp-y := platsmp.o headsmp.o
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smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o
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smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o
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smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o
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smp-$(CONFIG_ARCH_SH73A0) += smp-sh73a0.o headsmp-scu.o platsmp-scu.o
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smp-$(CONFIG_ARCH_R8A7779) += smp-r8a7779.o headsmp-scu.o platsmp-scu.o
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smp-$(CONFIG_ARCH_EMEV2) += smp-emev2.o headsmp-scu.o platsmp-scu.o
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# IRQ objects
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obj-$(CONFIG_ARCH_SH7372) += entry-intc.o
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@ -36,3 +36,52 @@ shmobile_boot_fn:
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.globl shmobile_boot_arg
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shmobile_boot_arg:
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2: .space 4
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/*
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* Per-CPU SMP boot function/argument selection code based on MPIDR
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*/
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ENTRY(shmobile_smp_boot)
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@ r0 = MPIDR_HWID_BITMASK
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mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR
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and r0, r1, r0 @ r0 = cpu_logical_map() value
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mov r1, #0 @ r1 = CPU index
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adr r5, 1f @ array of per-cpu mpidr values
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adr r6, 2f @ array of per-cpu functions
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adr r7, 3f @ array of per-cpu arguments
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shmobile_smp_boot_find_mpidr:
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ldr r8, [r5, r1, lsl #2]
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cmp r8, r0
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bne shmobile_smp_boot_next
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ldr r9, [r6, r1, lsl #2]
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cmp r9, #0
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bne shmobile_smp_boot_found
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shmobile_smp_boot_next:
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add r1, r1, #1
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cmp r1, #CONFIG_NR_CPUS
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blo shmobile_smp_boot_find_mpidr
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b shmobile_smp_sleep
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shmobile_smp_boot_found:
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ldr r0, [r7, r1, lsl #2]
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mov pc, r9
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ENDPROC(shmobile_smp_boot)
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ENTRY(shmobile_smp_sleep)
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wfi
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b shmobile_smp_boot
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ENDPROC(shmobile_smp_sleep)
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.globl shmobile_smp_mpidr
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shmobile_smp_mpidr:
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1: .space CONFIG_NR_CPUS * 4
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.globl shmobile_smp_fn
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shmobile_smp_fn:
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2: .space CONFIG_NR_CPUS * 4
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.globl shmobile_smp_arg
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shmobile_smp_arg:
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3: .space CONFIG_NR_CPUS * 4
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@ -9,7 +9,16 @@ extern void shmobile_setup_console(void);
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extern void shmobile_boot_vector(void);
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extern unsigned long shmobile_boot_fn;
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extern unsigned long shmobile_boot_arg;
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extern void shmobile_smp_boot(void);
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extern void shmobile_smp_sleep(void);
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extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,
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unsigned long arg);
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extern void shmobile_boot_scu(void);
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extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus);
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extern int shmobile_smp_scu_boot_secondary(unsigned int cpu,
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struct task_struct *idle);
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extern void shmobile_smp_scu_cpu_die(unsigned int cpu);
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extern int shmobile_smp_scu_cpu_kill(unsigned int cpu);
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struct clk;
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extern int shmobile_clk_init(void);
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extern void shmobile_handle_irq_intc(struct pt_regs *);
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81
arch/arm/mach-shmobile/platsmp-scu.c
Normal file
81
arch/arm/mach-shmobile/platsmp-scu.c
Normal file
@ -0,0 +1,81 @@
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/*
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* SMP support for SoCs with SCU covered by mach-shmobile
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*
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* Copyright (C) 2013 Magnus Damm
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include <mach/common.h>
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void __init shmobile_smp_scu_prepare_cpus(unsigned int max_cpus)
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{
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/* install boot code shared by all CPUs */
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shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);
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shmobile_boot_arg = MPIDR_HWID_BITMASK;
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/* enable SCU and cache coherency on booting CPU */
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scu_enable(shmobile_scu_base);
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scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
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}
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int shmobile_smp_scu_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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/* For this particular CPU register SCU boot vector */
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shmobile_smp_hook(cpu, virt_to_phys(shmobile_boot_scu),
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(unsigned long)shmobile_scu_base);
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return 0;
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}
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#ifdef CONFIG_HOTPLUG_CPU
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void shmobile_smp_scu_cpu_die(unsigned int cpu)
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{
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/* For this particular CPU deregister boot vector */
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shmobile_smp_hook(cpu, 0, 0);
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dsb();
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flush_cache_all();
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/* disable cache coherency */
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scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
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/* jump to shared mach-shmobile sleep / reset code */
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shmobile_smp_sleep();
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}
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static int shmobile_smp_scu_psr_core_disabled(int cpu)
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{
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unsigned long mask = SCU_PM_POWEROFF << (cpu * 8);
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if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
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return 1;
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return 0;
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}
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int shmobile_smp_scu_cpu_kill(unsigned int cpu)
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{
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int k;
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/* this function is running on another CPU than the offline target,
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* here we need wait for shutdown code in platform_cpu_die() to
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* finish before asking SoC-specific code to power off the CPU core.
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*/
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for (k = 0; k < 1000; k++) {
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if (shmobile_smp_scu_psr_core_disabled(cpu))
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return 1;
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mdelay(1);
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}
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return 0;
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}
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#endif
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@ -12,6 +12,9 @@
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*/
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <mach/common.h>
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void __init shmobile_smp_init_cpus(unsigned int ncores)
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{
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@ -26,3 +29,18 @@ void __init shmobile_smp_init_cpus(unsigned int ncores)
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for (i = 0; i < ncores; i++)
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set_cpu_possible(i, true);
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}
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extern unsigned long shmobile_smp_fn[];
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extern unsigned long shmobile_smp_arg[];
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extern unsigned long shmobile_smp_mpidr[];
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void shmobile_smp_hook(unsigned int cpu, unsigned long fn, unsigned long arg)
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{
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shmobile_smp_fn[cpu] = 0;
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flush_cache_all();
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shmobile_smp_mpidr[cpu] = cpu_logical_map(cpu);
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shmobile_smp_fn[cpu] = fn;
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shmobile_smp_arg[cpu] = arg;
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flush_cache_all();
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}
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@ -34,6 +34,12 @@
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static int emev2_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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int ret;
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ret = shmobile_smp_scu_boot_secondary(cpu, idle);
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if (ret)
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return ret;
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arch_send_wakeup_ipi_mask(cpumask_of(cpu_logical_map(cpu)));
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return 0;
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}
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@ -42,21 +48,16 @@ static void __init emev2_smp_prepare_cpus(unsigned int max_cpus)
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{
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void __iomem *smu;
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/* setup EMEV2 specific SCU base, enable */
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shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
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scu_enable(shmobile_scu_base);
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/* Tell ROM loader about our vector (in headsmp-scu.S, headsmp.S) */
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/* Tell ROM loader about our vector (in headsmp.S) */
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smu = ioremap(EMEV2_SMU_BASE, PAGE_SIZE);
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if (smu) {
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iowrite32(__pa(shmobile_boot_vector), smu + SMU_GENERAL_REG0);
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iounmap(smu);
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}
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shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
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shmobile_boot_arg = (unsigned long)shmobile_scu_base;
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/* enable cache coherency on booting CPU */
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scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
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/* setup EMEV2 specific SCU bits */
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shmobile_scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE);
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shmobile_smp_scu_prepare_cpus(max_cpus);
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}
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struct smp_operations emev2_smp_ops __initdata = {
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@ -84,33 +84,34 @@ static int r8a7779_platform_cpu_kill(unsigned int cpu)
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static int r8a7779_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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struct r8a7779_pm_ch *ch = NULL;
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int ret = -EIO;
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unsigned int lcpu = cpu_logical_map(cpu);
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int ret;
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cpu = cpu_logical_map(cpu);
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ret = shmobile_smp_scu_boot_secondary(cpu, idle);
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if (ret)
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return ret;
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if (cpu < ARRAY_SIZE(r8a7779_ch_cpu))
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ch = r8a7779_ch_cpu[cpu];
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if (lcpu < ARRAY_SIZE(r8a7779_ch_cpu))
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ch = r8a7779_ch_cpu[lcpu];
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if (ch)
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ret = r8a7779_sysc_power_up(ch);
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else
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ret = -EIO;
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return ret;
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}
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static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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{
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/* setup r8a7779 specific SCU base */
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shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
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scu_enable(shmobile_scu_base);
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/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
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__raw_writel(__pa(shmobile_boot_vector), AVECR);
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shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
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shmobile_boot_arg = (unsigned long)shmobile_scu_base;
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/* enable cache coherency on booting CPU */
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scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
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/* setup r8a7779 specific SCU bits */
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shmobile_scu_base = IOMEM(R8A7779_SCU_BASE);
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shmobile_smp_scu_prepare_cpus(max_cpus);
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r8a7779_pm_init();
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@ -121,47 +122,14 @@ static void __init r8a7779_smp_prepare_cpus(unsigned int max_cpus)
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static int r8a7779_scu_psr_core_disabled(int cpu)
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{
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unsigned long mask = 3 << (cpu * 8);
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if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask)
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return 1;
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return 0;
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}
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static int r8a7779_cpu_kill(unsigned int cpu)
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{
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int k;
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/* this function is running on another CPU than the offline target,
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* here we need wait for shutdown code in platform_cpu_die() to
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* finish before asking SoC-specific code to power off the CPU core.
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*/
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for (k = 0; k < 1000; k++) {
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if (r8a7779_scu_psr_core_disabled(cpu))
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return r8a7779_platform_cpu_kill(cpu);
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mdelay(1);
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}
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if (shmobile_smp_scu_cpu_kill(cpu))
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return r8a7779_platform_cpu_kill(cpu);
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return 0;
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}
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static void r8a7779_cpu_die(unsigned int cpu)
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{
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dsb();
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flush_cache_all();
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/* disable cache coherency */
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scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
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/* Endless loop until power off from r8a7779_cpu_kill() */
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while (1)
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cpu_do_idle();
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}
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static int r8a7779_cpu_disable(unsigned int cpu)
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{
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/* only CPU1->3 have power domains, do not allow hotplug of CPU0 */
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@ -173,8 +141,8 @@ struct smp_operations r8a7779_smp_ops __initdata = {
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.smp_prepare_cpus = r8a7779_smp_prepare_cpus,
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.smp_boot_secondary = r8a7779_boot_secondary,
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#ifdef CONFIG_HOTPLUG_CPU
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.cpu_kill = r8a7779_cpu_kill,
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.cpu_die = r8a7779_cpu_die,
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.cpu_disable = r8a7779_cpu_disable,
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.cpu_die = shmobile_smp_scu_cpu_die,
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.cpu_kill = r8a7779_cpu_kill,
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#endif
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};
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@ -20,14 +20,11 @@
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <mach/common.h>
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#include <asm/cacheflush.h>
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#include <asm/smp_plat.h>
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#include <mach/sh73a0.h>
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#include <asm/smp_scu.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_twd.h>
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#define WUPCR IOMEM(0xe6151010)
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@ -36,8 +33,6 @@
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#define SBAR IOMEM(0xe6180020)
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#define APARMBAREA IOMEM(0xe6f10020)
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#define PSTR_SHUTDOWN_MODE 3
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#define SH73A0_SCU_BASE 0xf0000000
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#ifdef CONFIG_HAVE_ARM_TWD
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@ -50,63 +45,33 @@ void __init sh73a0_register_twd(void)
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static int sh73a0_boot_secondary(unsigned int cpu, struct task_struct *idle)
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{
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cpu = cpu_logical_map(cpu);
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unsigned int lcpu = cpu_logical_map(cpu);
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int ret;
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if (((__raw_readl(PSTR) >> (4 * cpu)) & 3) == 3)
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__raw_writel(1 << cpu, WUPCR); /* wake up */
|
||||
ret = shmobile_smp_scu_boot_secondary(cpu, idle);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
if (((__raw_readl(PSTR) >> (4 * lcpu)) & 3) == 3)
|
||||
__raw_writel(1 << lcpu, WUPCR); /* wake up */
|
||||
else
|
||||
__raw_writel(1 << cpu, SRESCR); /* reset */
|
||||
__raw_writel(1 << lcpu, SRESCR); /* reset */
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init sh73a0_smp_prepare_cpus(unsigned int max_cpus)
|
||||
{
|
||||
/* setup sh73a0 specific SCU base */
|
||||
shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
|
||||
scu_enable(shmobile_scu_base);
|
||||
|
||||
/* Map the reset vector (in headsmp-scu.S, headsmp.S) */
|
||||
/* Map the reset vector (in headsmp.S) */
|
||||
__raw_writel(0, APARMBAREA); /* 4k */
|
||||
__raw_writel(__pa(shmobile_boot_vector), SBAR);
|
||||
shmobile_boot_fn = virt_to_phys(shmobile_boot_scu);
|
||||
shmobile_boot_arg = (unsigned long)shmobile_scu_base;
|
||||
|
||||
/* enable cache coherency on booting CPU */
|
||||
scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL);
|
||||
/* setup sh73a0 specific SCU bits */
|
||||
shmobile_scu_base = IOMEM(SH73A0_SCU_BASE);
|
||||
shmobile_smp_scu_prepare_cpus(max_cpus);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
static int sh73a0_cpu_kill(unsigned int cpu)
|
||||
{
|
||||
|
||||
int k;
|
||||
u32 pstr;
|
||||
|
||||
/*
|
||||
* wait until the power status register confirms the shutdown of the
|
||||
* offline target
|
||||
*/
|
||||
for (k = 0; k < 1000; k++) {
|
||||
pstr = (__raw_readl(PSTR) >> (4 * cpu)) & 3;
|
||||
if (pstr == PSTR_SHUTDOWN_MODE)
|
||||
return 1;
|
||||
|
||||
mdelay(1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sh73a0_cpu_die(unsigned int cpu)
|
||||
{
|
||||
/* Set power off mode. This takes the CPU out of the MP cluster */
|
||||
scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF);
|
||||
|
||||
/* Enter shutdown mode */
|
||||
cpu_do_idle();
|
||||
}
|
||||
|
||||
static int sh73a0_cpu_disable(unsigned int cpu)
|
||||
{
|
||||
return 0; /* CPU0 and CPU1 supported */
|
||||
@ -117,8 +82,8 @@ struct smp_operations sh73a0_smp_ops __initdata = {
|
||||
.smp_prepare_cpus = sh73a0_smp_prepare_cpus,
|
||||
.smp_boot_secondary = sh73a0_boot_secondary,
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
.cpu_kill = sh73a0_cpu_kill,
|
||||
.cpu_die = sh73a0_cpu_die,
|
||||
.cpu_disable = sh73a0_cpu_disable,
|
||||
.cpu_die = shmobile_smp_scu_cpu_die,
|
||||
.cpu_kill = shmobile_smp_scu_cpu_kill,
|
||||
#endif
|
||||
};
|
||||
|
||||
Loading…
Reference in New Issue
Block a user