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tg3: Allow single MSI-X vector allocations
This patch changes the code to make it legal to allocate only one MSI-X vector. It also fixes a bug where the driver was not checking for error return codes from pci_enable_msix(). Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -145,8 +145,6 @@
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#define TG3_RX_JMB_BUFF_RING_SIZE \
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#define TG3_RX_JMB_BUFF_RING_SIZE \
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(sizeof(struct ring_info) * TG3_RX_JUMBO_RING_SIZE)
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(sizeof(struct ring_info) * TG3_RX_JUMBO_RING_SIZE)
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#define TG3_RSS_MIN_NUM_MSIX_VECS 2
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/* Due to a hardware bug, the 5701 can only DMA to memory addresses
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/* Due to a hardware bug, the 5701 can only DMA to memory addresses
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* that are at least dword aligned when used in PCIX mode. The driver
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* that are at least dword aligned when used in PCIX mode. The driver
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* works around this bug by double copying the packet. This workaround
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* works around this bug by double copying the packet. This workaround
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@ -8797,9 +8795,9 @@ static bool tg3_enable_msix(struct tg3 *tp)
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}
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}
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rc = pci_enable_msix(tp->pdev, msix_ent, tp->irq_cnt);
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rc = pci_enable_msix(tp->pdev, msix_ent, tp->irq_cnt);
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if (rc != 0) {
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if (rc < 0) {
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if (rc < TG3_RSS_MIN_NUM_MSIX_VECS)
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return false;
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return false;
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} else if (rc != 0) {
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if (pci_enable_msix(tp->pdev, msix_ent, rc))
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if (pci_enable_msix(tp->pdev, msix_ent, rc))
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return false;
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return false;
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netdev_notice(tp->dev, "Requested %d MSI-X vectors, received %d\n",
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netdev_notice(tp->dev, "Requested %d MSI-X vectors, received %d\n",
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@ -8807,16 +8805,18 @@ static bool tg3_enable_msix(struct tg3 *tp)
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tp->irq_cnt = rc;
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tp->irq_cnt = rc;
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}
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}
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tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS;
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for (i = 0; i < tp->irq_max; i++)
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for (i = 0; i < tp->irq_max; i++)
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tp->napi[i].irq_vec = msix_ent[i].vector;
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tp->napi[i].irq_vec = msix_ent[i].vector;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
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tp->dev->real_num_tx_queues = 1;
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tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS;
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if (tp->irq_cnt > 1) {
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tp->dev->real_num_tx_queues = tp->irq_cnt - 1;
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tp->tg3_flags3 |= TG3_FLG3_ENABLE_RSS;
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} else
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tp->dev->real_num_tx_queues = 1;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
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tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS;
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tp->dev->real_num_tx_queues = tp->irq_cnt - 1;
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}
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}
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return true;
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return true;
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}
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}
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