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https://github.com/edk2-porting/linux-next.git
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V4L/DVB (7370): Add basic support for Prolink Pixelview MPEG 8000GT
TV reception ok. S-video and Composite not tested. Audio not tested. IR not implemented yet. Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -64,3 +64,4 @@
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63 -> Geniatech X8000-MT DVBT [14f1:8852]
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64 -> DViCO FusionHDTV DVB-T PRO [18ac:db30]
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65 -> DViCO FusionHDTV 7 Gold [18ac:d610]
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66 -> Prolink Pixelview MPEG 8000GT [1554:4935]
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@ -1591,6 +1591,29 @@ static const struct cx88_board cx88_boards[] = {
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.gpio0 = 0x16d9,
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}},
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},
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[CX88_BOARD_PROLINK_PV_8000GT] = {
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.name = "Prolink Pixelview MPEG 8000GT",
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.tuner_type = TUNER_XC2028,
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.tuner_addr = 0x61,
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.input = { {
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.type = CX88_VMUX_TELEVISION,
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.vmux = 0,
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.gpio0 = 0x0ff,
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.gpio2 = 0x0cfb,
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}, {
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.type = CX88_VMUX_COMPOSITE1,
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.vmux = 1,
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.gpio2 = 0x0cfb,
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}, {
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.type = CX88_VMUX_SVIDEO,
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.vmux = 2,
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.gpio2 = 0x0cfb,
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} },
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.radio = {
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.type = CX88_RADIO,
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.gpio2 = 0x0cfb,
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},
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},
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};
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/* ------------------------------------------------------------------ */
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@ -1928,11 +1951,15 @@ static const struct cx88_subid cx88_subids[] = {
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.subvendor = 0x14f1,
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.subdevice = 0x8852,
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.card = CX88_BOARD_GENIATECH_X8000_MT,
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},{
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}, {
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.subvendor = 0x18ac,
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.subdevice = 0xd610,
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.card = CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD,
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}
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}, {
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.subvendor = 0x1554,
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.subdevice = 0x4935,
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.card = CX88_BOARD_PROLINK_PV_8000GT,
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},
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};
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/* ----------------------------------------------------------------------- */
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@ -2063,9 +2090,10 @@ static void gdi_eeprom(struct cx88_core *core, u8 *eeprom_data)
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/* ------------------------------------------------------------------- */
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/* some Divco specific stuff */
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static int cx88_dvico_xc2028_callback(void *ptr, int command, int arg)
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static int cx88_dvico_xc2028_callback(void *priv, int command, int arg)
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{
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struct cx88_core *core = ptr;
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struct i2c_algo_bit_data *i2c_algo = priv;
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struct cx88_core *core = i2c_algo->data;
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switch (command) {
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case XC2028_TUNER_RESET:
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@ -2113,6 +2141,28 @@ static int cx88_xc3028_geniatech_tuner_callback(void *priv, int command, int mod
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return -EINVAL;
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}
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/* ------------------------------------------------------------------- */
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/* some Divco specific stuff */
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static int cx88_pv_8000gt_callback(void *priv, int command, int arg)
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{
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struct i2c_algo_bit_data *i2c_algo = priv;
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struct cx88_core *core = i2c_algo->data;
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switch (command) {
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case XC2028_TUNER_RESET:
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cx_write(MO_GP2_IO, 0xcf7);
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mdelay(50);
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cx_write(MO_GP2_IO, 0xef5);
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mdelay(50);
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cx_write(MO_GP2_IO, 0xcf7);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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/* ----------------------------------------------------------------------- */
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/* some DViCO specific stuff */
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@ -2159,6 +2209,8 @@ static int cx88_xc2028_tuner_callback(void *priv, int command, int arg)
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case CX88_BOARD_POWERCOLOR_REAL_ANGEL:
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case CX88_BOARD_GENIATECH_X8000_MT:
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return cx88_xc3028_geniatech_tuner_callback(priv, command, arg);
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case CX88_BOARD_PROLINK_PV_8000GT:
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return cx88_pv_8000gt_callback(priv, command, arg);
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case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
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return cx88_dvico_xc2028_callback(priv, command, arg);
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}
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@ -2291,6 +2343,16 @@ static void cx88_card_setup_pre_i2c(struct cx88_core *core)
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cx_set(MO_GP0_IO, 0x00000080); /* 702 out of reset */
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udelay(1000);
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break;
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case CX88_BOARD_PROLINK_PV_8000GT:
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cx_write(MO_GP2_IO, 0xcf7);
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mdelay(50);
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cx_write(MO_GP2_IO, 0xef5);
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mdelay(50);
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cx_write(MO_GP2_IO, 0xcf7);
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msleep(10);
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break;
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case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
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/* Enable the xc5000 tuner */
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cx_set(MO_GP0_IO, 0x00001010);
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@ -218,6 +218,7 @@ extern struct sram_channel cx88_sram_channels[];
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#define CX88_BOARD_GENIATECH_X8000_MT 63
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#define CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO 64
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#define CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD 65
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#define CX88_BOARD_PROLINK_PV_8000GT 66
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enum cx88_itype {
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CX88_VMUX_COMPOSITE1 = 1,
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