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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-11-18 23:54:26 +08:00

[MTD] Fix CFI build error when no map width or interleave supported

When building NOR flash support, you have compile-time options for the
bus width and the number of individual chips which are interleaved
together onto that bus. The code to deal with arbitrary geometry is a
bit convoluted, and people want to just configure it for the specific
hardware they have, to avoid the runtime overhead.

Selecting _none_ of the available options doesn't make any sense. You
should have at least one. This makes it build though, since people
persist in trying.

Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit is contained in:
David Woodhouse 2007-09-06 09:40:21 +01:00
parent d15057b703
commit 241651d04d
2 changed files with 18 additions and 1 deletions

View File

@ -57,6 +57,15 @@
#define cfi_interleave_is_8(cfi) (0)
#endif
#ifndef cfi_interleave
#warning No CONFIG_MTD_CFI_Ix selected. No NOR chip support can work.
static inline int cfi_interleave(void *cfi)
{
BUG();
return 0;
}
#endif
static inline int cfi_interleave_supported(int i)
{
switch (i) {

View File

@ -125,7 +125,15 @@
#endif
#ifndef map_bankwidth
#error "No bus width supported. What's the point?"
#warning "No CONFIG_MTD_MAP_BANK_WIDTH_xx selected. No NOR chip support can work"
static inline int map_bankwidth(void *map)
{
BUG();
return 0;
}
#define map_bankwidth_is_large(map) (0)
#define map_words(map) (0)
#define MAX_MAP_BANKWIDTH 1
#endif
static inline int map_bankwidth_supported(int w)