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net: hns3: check reset interrupt status when reset fails
Currently, the reset interrupt will be cleared firstly, so when
reset fails, if interrupt status register has reset interrupt,
it means there is a new coming reset.
Fixes: 72e2fb0799
("net: hns3: clear reset interrupt status in hclge_irq_handle()")
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Reviewed-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
c9765a89d1
commit
2336f19d78
@ -3536,11 +3536,10 @@ static bool hclge_reset_err_handle(struct hclge_dev *hdev)
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dev_info(&hdev->pdev->dev, "Reset pending %lu\n",
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hdev->reset_pending);
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return true;
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} else if ((hdev->reset_type != HNAE3_IMP_RESET) &&
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(hclge_read_dev(&hdev->hw, HCLGE_GLOBAL_RESET_REG) &
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BIT(HCLGE_IMP_RESET_BIT))) {
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} else if (hclge_read_dev(&hdev->hw, HCLGE_MISC_VECTOR_INT_STS) &
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HCLGE_RESET_INT_M) {
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dev_info(&hdev->pdev->dev,
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"reset failed because IMP Reset is pending\n");
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"reset failed because new reset interrupt\n");
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hclge_clear_reset_cause(hdev);
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return false;
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} else if (hdev->reset_fail_cnt < MAX_RESET_FAIL_CNT) {
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@ -164,6 +164,7 @@ enum HLCGE_PORT_TYPE {
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#define HCLGE_GLOBAL_RESET_BIT 0
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#define HCLGE_CORE_RESET_BIT 1
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#define HCLGE_IMP_RESET_BIT 2
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#define HCLGE_RESET_INT_M GENMASK(2, 0)
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#define HCLGE_FUN_RST_ING 0x20C00
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#define HCLGE_FUN_RST_ING_B 0
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