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kbuild: get rid of duplication in *.mod files
It is allowed to add the same objects multiple times to obj-y / obj-m: obj-y += foo.o foo.o foo.o obj-m += bar.o bar.o bar.o It is also allowed to add the same objects multiple times to a composite module: obj-m += foo.o foo-y := foo1.o foo2.o foo2.o foo1.o This flexibility is useful because the same object might be selected by different CONFIG options, like this: obj-m += foo.o foo-y := foo1.o foo-$(CONFIG_FOO_X) += foo2.o foo-$(CONFIG_FOO_Y) += foo2.o The duplicated objects are omitted at link time. It works naturally in Makefiles because GNU Make removes duplication in $^ without changing the order. It is working well, almost... A small flaw I notice is, *.mod contains duplication in such a case. This is probably not a big deal. As far as I know, the only small problem is scripts/mod/sumversion.c parses the same file multiple times. I am fixing this because I plan to reuse *.mod for other purposes, where the duplication can be problematic. The code change is quite simple. We already use awk to drop duplicated lines in modules.order (see cmd_modules_order in the same file). I copied the code, but changed RS to use spaces as record separators. I also changed the file format to list one object per line. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
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@ -303,7 +303,8 @@ $(obj)/%.prelink.o: $(obj)/%.o FORCE
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$(call if_changed,cc_prelink_modules)
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endif
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cmd_mod = echo $(addprefix $(obj)/, $(call real-search, $*.o, .o, -objs -y -m)) > $@
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cmd_mod = echo $(addprefix $(obj)/, $(call real-search, $*.o, .o, -objs -y -m)) | \
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$(AWK) -v RS='( |\n)' '!x[$$0]++' > $@
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$(obj)/%.mod: $(obj)/%$(mod-prelink-ext).o FORCE
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$(call if_changed,mod)
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@ -398,7 +398,7 @@ void get_src_version(const char *modname, char sum[], unsigned sumlen)
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buf = read_text_file(filelist);
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md4_init(&md);
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while ((fname = strsep(&buf, " \n"))) {
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while ((fname = strsep(&buf, "\n"))) {
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if (!*fname)
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continue;
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if (!(is_static_library(fname)) &&
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