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mmc: host: tmio: SDIO_STATUS_QUIRK is rather SDIO_STATUS_SETBITS
QUIRK sounds like there is something wrong, but actually there are just some bits which need to be 1. Rename it to be more clear. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -641,10 +641,8 @@ static int sh_mobile_sdhi_probe(struct platform_device *pdev)
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*/
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mmc_data->flags |= TMIO_MMC_HAVE_CMD12_CTRL;
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/*
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* All SDHI need SDIO_INFO1 reserved bit
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*/
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mmc_data->flags |= TMIO_MMC_SDIO_STATUS_QUIRK;
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/* All SDHI have SDIO status bits which must be 1 */
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mmc_data->flags |= TMIO_MMC_SDIO_STATUS_SETBITS;
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ret = tmio_mmc_host_probe(host, mmc_data);
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if (ret < 0)
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@ -723,7 +723,7 @@ static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
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ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
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sdio_status = status & ~TMIO_SDIO_MASK_ALL;
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if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
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if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
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sdio_status |= 6;
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sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
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@ -94,10 +94,8 @@
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*/
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#define TMIO_MMC_HAVE_CMD12_CTRL (1 << 7)
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/*
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* Some controllers needs to set 1 on SDIO status reserved bits
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*/
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#define TMIO_MMC_SDIO_STATUS_QUIRK (1 << 8)
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/* Controller has some SDIO status bits which must be 1 */
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#define TMIO_MMC_SDIO_STATUS_SETBITS (1 << 8)
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/*
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* Some controllers have a 32-bit wide data port register
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